Simplified version
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265864a2e8
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@ -352,6 +352,7 @@ impl<SPIAddr, GPIOAddr> St7735IO<SPIAddr, GPIOAddr>
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.set_clock_divider(8)
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.set_clock_divider(8)
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// required for master mode, even if ss is done manually
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// required for master mode, even if ss is done manually
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.set_slave_select_output_enabled(true)
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.set_slave_select_output_enabled(true)
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.set_enabled(true)
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});
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});
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let mut io = St7735IO {
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let mut io = St7735IO {
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@ -408,11 +409,9 @@ impl<SPIAddr, GPIOAddr> St7735IO<SPIAddr, GPIOAddr>
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}
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}
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fn write_byte(&mut self, byte : u8) {
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fn write_byte(&mut self, byte : u8) {
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self.spi.set_enabled(true);
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self.spi.set_data(byte as u32);
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self.spi.set_data(byte as u32);
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while !self.spi.rx_buffer_not_empty() {}
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while !self.spi.tx_buffer_empty() {};
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while self.spi.busy() {}
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while self.spi.busy() {}
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self.spi.set_enabled(false);
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}
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}
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pub fn write_data_byte(&mut self, data : u8) {
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pub fn write_data_byte(&mut self, data : u8) {
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@ -573,6 +572,7 @@ impl<SPIAddr, GPIOAddr> St7735IO<SPIAddr, GPIOAddr>
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pub fn done(mut self) -> (St7735, PeripheralRef<spi::SPI, SPIAddr>, PeripheralRef<gpio::GPIO, GPIOAddr>) {
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pub fn done(mut self) -> (St7735, PeripheralRef<spi::SPI, SPIAddr>, PeripheralRef<gpio::GPIO, GPIOAddr>) {
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self.set_cs();
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self.set_cs();
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self.spi.set_enabled(false);
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(self.st7735, self.spi, self.gpio)
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(self.st7735, self.spi, self.gpio)
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}
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}
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}
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}
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