diff --git a/src/st7735.rs b/src/st7735.rs
index b5a70d2..10911fc 100644
--- a/src/st7735.rs
+++ b/src/st7735.rs
@@ -352,6 +352,7 @@ impl<SPIAddr, GPIOAddr> St7735IO<SPIAddr, GPIOAddr>
             .set_clock_divider(8)
             // required for master mode, even if ss is done manually
             .set_slave_select_output_enabled(true)
+            .set_enabled(true)
         });
 
         let mut io = St7735IO {
@@ -408,11 +409,9 @@ impl<SPIAddr, GPIOAddr> St7735IO<SPIAddr, GPIOAddr>
     }
 
     fn write_byte(&mut self, byte : u8) {
-        self.spi.set_enabled(true);
         self.spi.set_data(byte as u32);
-        while !self.spi.rx_buffer_not_empty() {}
+        while !self.spi.tx_buffer_empty() {};
         while self.spi.busy() {}
-        self.spi.set_enabled(false);
     }
 
     pub fn write_data_byte(&mut self, data : u8) {
@@ -573,6 +572,7 @@ impl<SPIAddr, GPIOAddr> St7735IO<SPIAddr, GPIOAddr>
 
     pub fn done(mut self) -> (St7735, PeripheralRef<spi::SPI, SPIAddr>, PeripheralRef<gpio::GPIO, GPIOAddr>) {
         self.set_cs();
+        self.spi.set_enabled(false);
         (self.st7735, self.spi, self.gpio)
     }
 }