parent
507bd0dfef
commit
0c5614e38e
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@ -1,6 +1,6 @@
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[package]
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authors = ["LongHairedHacker <sebastian@sebastians-site.de>"]
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name = "wspr-beacon"
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name = "stm32-pll-ssb"
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edition = "2018"
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version = "0.1.0"
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@ -11,11 +11,12 @@ cortex-m-rtic = "1.1.3"
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defmt = "0.3.2"
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defmt-rtt = "0.3.2"
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panic-probe = { version = "0.3.0", features = ["print-defmt"] }
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stm32f1xx-hal = { version = "0.9.0", features = ["stm32f103", "rt"] }
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stm32f1xx-hal = { version = "0.9.0", features = ["stm32f103", "rt", "medium"] }
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embedded-hal = {version = "0.2.3"}
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nb = "1.0.0"
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arrayvec = {version = "0.7.0", default-features = false}
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systick-monotonic = "1.0.0"
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num-traits = { version = "0.2", default-features = false, features = ["libm"] }
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[features]
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95
src/main.rs
95
src/main.rs
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@ -16,29 +16,28 @@ use rtic::app;
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mod si5153;
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#[app(device = stm32f1xx_hal::pac, peripherals = true, dispatchers = [TIM2])]
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#[app(device = stm32f1xx_hal::pac, peripherals = true, dispatchers = [SPI3])]
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mod app {
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use core::num::dec2flt::float;
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use stm32f1xx_hal::{
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adc,
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gpio::{
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self, gpioa, gpiob, gpioc, Alternate, Analog, Floating, Input, OpenDrain, Output,
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PushPull, CRL,
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PushPull, CRH, CRL,
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},
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i2c,
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i2c::BlockingI2c,
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pac::{ADC1, I2C1},
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pac::{ADC1, I2C1, TIM4},
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prelude::*,
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serial::{self, Config, Serial},
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stm32,
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timer::{self, Event},
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timer::{self, Channel, Event, Tim3NoRemap, Tim4NoRemap},
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};
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use systick_monotonic::Systick;
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use arrayvec::ArrayString;
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use num_traits::float::Float;
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use crate::si5153;
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@ -50,8 +49,15 @@ mod app {
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),
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>;
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type AudioPwm = timer::PwmHz<
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TIM4,
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Tim4NoRemap,
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timer::Ch<2>,
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gpio::Pin<Alternate<gpio::PushPull>, CRH, 'B', 8>,
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>;
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#[monotonic(binds = SysTick, default = true)]
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type MonoTimer = Systick<1_000_000>;
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type MonoTimer = Systick<1_000>;
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#[shared]
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struct Shared {}
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@ -61,8 +67,13 @@ mod app {
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pll: si5153::Si5153<AppI2C1>,
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i2c: AppI2C1,
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board_led: gpioc::PC13<Output<PushPull>>,
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rx_en: gpioa::PA7<Output<PushPull>>,
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adc1: adc::Adc<ADC1>,
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mic_in: gpio::Pin<Analog, CRL, 'A', 4>,
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i_in: gpio::Pin<Analog, CRL, 'A', 1>,
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q_in: gpio::Pin<Analog, CRL, 'A', 0>,
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phase: f32,
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audio_pwm: AudioPwm,
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}
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#[init]
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@ -111,16 +122,50 @@ mod app {
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let mut pll = si5153::Si5153::new(&i2c);
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pll.init(&mut i2c, 25000000, 800000000, 800000000);
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pll.set_ms_source(&mut i2c, si5153::Multisynth::MS0, si5153::PLL::A);
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pll.set_ms_source(&mut i2c, si5153::Multisynth::MS1, si5153::PLL::A);
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pll.set_ms_source(&mut i2c, si5153::Multisynth::MS2, si5153::PLL::B);
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pll.set_ms_freq(&mut i2c, si5153::Multisynth::MS0, 8_000_000);
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pll.set_ms_phase(&mut i2c, si5153::Multisynth::MS0, 100);
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pll.enable_ms_output(&mut i2c, si5153::Multisynth::MS0);
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pll.set_ms_freq(&mut i2c, si5153::Multisynth::MS1, 8_000_000);
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pll.set_ms_phase(&mut i2c, si5153::Multisynth::MS1, 0);
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pll.enable_ms_output(&mut i2c, si5153::Multisynth::MS1);
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pll.pll_reset(&mut i2c);
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let adc1 = adc::Adc::adc1(cx.device.ADC1, clocks);
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let mic_in = gpioa.pa4.into_analog(&mut gpioa.crl);
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let mut pwm =
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cx.device
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.TIM2
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.pwm_hz::<Tim3NoRemap, _, _>(pins, &mut afio.mapr, 4800.Hz(), &clocks);
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let i_in = gpioa.pa1.into_analog(&mut gpioa.crl);
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let q_in = gpioa.pa0.into_analog(&mut gpioa.crl);
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transmit::spawn().unwrap();
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let audio_out = gpiob.pb8.into_alternate_push_pull(&mut gpiob.crh);
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let mut audio_pwm = cx.device.TIM4.pwm_hz::<Tim4NoRemap, _, _>(
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audio_out,
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&mut afio.mapr,
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4800.Hz(),
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&clocks,
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);
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audio_pwm.enable(Channel::C3);
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audio_pwm.set_duty(Channel::C3, 0u16);
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let mut rx_en = gpioa.pa7.into_push_pull_output(&mut gpioa.crl);
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rx_en.set_high();
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let mut bias_pin = gpioa.pa6.into_alternate_push_pull(&mut gpioa.crl);
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let mut bias_pwm = cx.device.TIM3.pwm_hz::<Tim3NoRemap, _, _>(
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bias_pin,
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&mut afio.mapr,
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4800.Hz(),
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&clocks,
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);
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let mut timer = timer::Timer2::new(cx.device.TIM2, &clocks).counter_hz();
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timer.start(4800.Hz()).unwrap();
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// Generate an interrupt when the timer expires
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timer.listen(Event::Update);
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(
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Shared {},
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@ -128,21 +173,35 @@ mod app {
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i2c,
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pll,
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board_led,
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rx_en,
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adc1,
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mic_in,
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i_in,
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q_in,
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phase: 0.0,
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audio_pwm,
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},
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init::Monotonics(mono),
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)
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}
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#[task(local=[pll, i2c, adc1, mic_in])]
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#[task(binds=TIM2, local=[pll, i2c, adc1, mic_in, i_in, q_in, audio_pwm, phase, board_led])]
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fn transmit(mut ctx: transmit::Context) {
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let mut adc = ctx.local.adc1;
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let mut mic_in = ctx.local.mic_in;
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*ctx.local.phase += core::f32::consts::PI * 2.0 * 1000.0 / 4800.0;
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if *ctx.local.phase > 2.0 * core::f32::consts::PI {
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*ctx.local.phase -= core::f32::consts::PI;
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ctx.local.board_led.toggle();
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}
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let data: u16 = adc.read(&mut *mic_in).unwrap();
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let sample = (data as f32 / u16::MAX as f32);
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//defmt::debug!("Phase: {}", ctx.local.phase);
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transmit::spawn_after(208.micros().into()).unwrap();
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let max_duty = if ctx.local.audio_pwm.get_max_duty() != 0 {
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ctx.local.audio_pwm.get_max_duty() as f32
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} else {
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2.0.powi(16)
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};
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let sample = (ctx.local.phase.sin() + 0.5) * max_duty;
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ctx.local.audio_pwm.set_duty(Channel::C3, sample as u16);
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}
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}
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@ -31,6 +31,7 @@ pub enum Multisynth {
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const MS_BASE_ADDR: [u8; 3] = [42, 50, 58];
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const MS_CTRL_ADDR: [u8; 3] = [16, 17, 18];
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const CLK_PHOFF_ADDR: [u8; 3] = [165, 166, 167];
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impl Multisynth {
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fn base_address(&self) -> u8 {
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fn ctrl_address(&self) -> u8 {
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return MS_CTRL_ADDR[*self as usize];
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}
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fn phoff_address(&self) -> u8 {
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defmt::debug!("Adress: {}", CLK_PHOFF_ADDR[*self as usize]);
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return CLK_PHOFF_ADDR[*self as usize];
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}
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}
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pub struct PllParams {
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self.write_byte_reg(i2c, CLK_ENABLE_CONTROL, self.outputs); // Disable all outputs
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self.write_byte_reg(i2c, XTAL_LOAD_CAP, 0xD2); //crystal load capacitor = 10pF
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self.write_byte_reg(i2c, PLL_RESET, 0xA0); // Reset both PLLs
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for ms in [Multisynth::MS0, Multisynth::MS1, Multisynth::MS2].iter() {
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self.ms_srcs[*ms as usize] = PLL::A;
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self.write_byte_reg(i2c, ms.ctrl_address(), 0x0F); // MSi as Source, PLLA to MSi, 8 mA output
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self.write_byte_reg(i2c, ms.phoff_address(), 0); // Phase offset to 0.
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}
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for pll in [PLL::A, PLL::B].iter() {
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self.write_params(i2c, pll.base_address(), ¶ms)
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}
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self.write_byte_reg(i2c, PLL_RESET, 0xA0); // Reset both PLLs
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}
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pub fn enable_ms_output(&mut self, i2c: &mut I2C, synth: Multisynth) {
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self.write_params(i2c, synth.base_address(), ¶ms)
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}
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pub fn set_ms_phase(&mut self, i2c: &mut I2C, synth: Multisynth, phase: u8) {
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self.write_byte_reg(i2c, synth.phoff_address(), phase);
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}
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pub fn pll_reset(&mut self, i2c: &mut I2C) {
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self.write_byte_reg(i2c, PLL_RESET, 0xA0);
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}
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fn write_byte_reg(&self, i2c: &mut I2C, reg_addr: u8, data: u8) {
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let res = i2c.write(I2C_ADDR, &[reg_addr, data]);
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if res.is_err() {
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Loading…
Reference in New Issue