Initial commit
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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rustflags = [
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"-C", "linker=rust-lld",
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"-C", "link-arg=-Tlink.x",
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]
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runner = "probe-run --chip STM32F103CB"
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[build]
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target = "thumbv7m-none-eabi"
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**/*.rs.bk
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.#*
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.gdb_history
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Cargo.lock
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target/
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[package]
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authors = ["sebastian"]
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edition = "2018"
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readme = "README.md"
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name = "reflow-firmware"
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version = "0.1.0"
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[dependencies]
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cortex-m = "0.6"
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cortex-m-rt = "0.6"
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stm32f1xx-hal = { version = "0.5.3", features = ["stm32f103", "rt"] }
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panic-semihosting = "0.5"
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embedded-hal = "0.2.3"
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rtt-target = {version = "0.2.2", features = ["cortex-m"]}
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# this lets you use `cargo fix`!
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[[bin]]
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name = "reflow-firmware"
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test = false
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bench = false
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[profile.release]
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codegen-units = 1 # better optimizations
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debug = true # symbols are nice and they don't increase the size on Flash
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lto = true # better optimizations
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use std::env;
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use std::fs;
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use std::io::Write;
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use std::path::PathBuf;
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fn main() {
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// Put the linker script somewhere the linker can find it
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let out_dir = PathBuf::from(env::var("OUT_DIR").unwrap());
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fs::File::create(out_dir.join("memory.x"))
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.unwrap()
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.write_all(include_bytes!("memory.x"))
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.unwrap();
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println!("cargo:rustc-link-search={}", out_dir.display());
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println!("cargo:rerun-if-changed=memory.x");
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}
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MEMORY
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{
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/* STM32f1*/
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FLASH : ORIGIN = 0x08000000, LENGTH = 0x00020000
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RAM : ORIGIN = 0x20000000, LENGTH = 0x00005000
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}
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/* This is where the call stack will be allocated. */
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/* The stack is of the full descending type. */
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/* You may want to use this variable to locate the call stack and static
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variables in different memory regions. Below is shown the default value */
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/* _stack_start = ORIGIN(RAM) + LENGTH(RAM); */
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/* You can use this symbol to customize the location of the .text section */
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/* If omitted the .text section will be placed right after the .vector_table
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section */
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/* This is required only on microcontrollers that store some configuration right
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after the vector table */
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/* _stext = ORIGIN(FLASH) + 0x400; */
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/* Example of putting non-initialized variables into custom RAM locations. */
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/* This assumes you have defined a region RAM2 above, and in the Rust
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sources added the attribute `#[link_section = ".ram2bss"]` to the data
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you want to place there. */
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/* Note that the section will not be zero-initialized by the runtime! */
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/* SECTIONS {
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.ram2bss (NOLOAD) : ALIGN(4) {
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*(.ram2bss);
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. = ALIGN(4);
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} > RAM2
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} INSERT AFTER .bss;
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*/
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#![deny(unsafe_code)]
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#![no_std]
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#![no_main]
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extern crate panic_semihosting;
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use cortex_m_rt::entry;
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use embedded_hal::digital::v2::OutputPin;
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use rtt_target::{rprintln, rtt_init_print};
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use stm32f1xx_hal::{delay::Delay, pac, prelude::*};
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#[entry]
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fn main() -> ! {
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rtt_init_print!();
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// Get access to the core peripherals from the cortex-m crate
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let cp = cortex_m::Peripherals::take().unwrap();
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// Get access to the device specific peripherals from the peripheral access crate
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let dp = pac::Peripherals::take().unwrap();
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// Take ownership over the raw flash and rcc devices and convert them into the corresponding
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// HAL structs
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let mut flash = dp.FLASH.constrain();
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let mut rcc = dp.RCC.constrain();
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// Freeze the configuration of all the clocks in the system and store the frozen frequencies in
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// `clocks`
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let clocks = rcc.cfgr.freeze(&mut flash.acr);
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// Acquire the GPIOC peripheral
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let mut gpioc = dp.GPIOC.split(&mut rcc.apb2);
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// Configure gpio C pin 13 as a push-pull output. The `crh` register is passed to the function
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// in order to configure the port. For pins 0-7, crl should be passed instead.
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let mut led = gpioc.pc13.into_push_pull_output(&mut gpioc.crh);
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let mut delay = Delay::new(cp.SYST, clocks);
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// Blink using the delay function
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loop {
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rprintln!("blink");
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led.set_high().unwrap();
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delay.delay_ms(1000u16);
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rprintln!("blonk");
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led.set_low().unwrap();
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delay.delay_ms(1000u16);
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}
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}
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