First layout draft
This commit is contained in:
parent
2d004a3f66
commit
c4bad10952
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(fp_lib_table
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(lib (name "fy6900-ocxo")(type "KiCad")(uri "/home/sebastian/projects/fy6900-ocxo.pretty")(options "")(descr ""))
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(lib (name "ocxo")(type "KiCad")(uri "${KIPRJMOD}/ocxo.pretty")(options "")(descr ""))
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)
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12798
fy6900-ocxo.kicad_pcb
12798
fy6900-ocxo.kicad_pcb
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@ -1,6 +1,6 @@
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{
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"board": {
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"active_layer": 0,
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"active_layer": 44,
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"active_layer_preset": "",
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"auto_track_width": true,
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"hidden_nets": [],
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@ -62,7 +62,7 @@
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35,
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36
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],
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"visible_layers": "fffffff_ffffffff",
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"visible_layers": "7ffffff_80000001",
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"zone_display_mode": 0
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},
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"meta": {
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@ -2,26 +2,137 @@
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"board": {
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"design_settings": {
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"defaults": {
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"board_outline_line_width": 0.1,
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"copper_line_width": 0.2,
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"board_outline_line_width": 0.09999999999999999,
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"copper_line_width": 0.19999999999999998,
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"copper_text_italic": false,
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"copper_text_size_h": 1.5,
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"copper_text_size_v": 1.5,
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"copper_text_thickness": 0.3,
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"copper_text_upright": false,
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"courtyard_line_width": 0.049999999999999996,
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"dimension_precision": 4,
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"dimension_units": 3,
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"dimensions": {
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"arrow_length": 1270000,
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"extension_offset": 500000,
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"keep_text_aligned": true,
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"suppress_zeroes": false,
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"text_position": 0,
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"units_format": 1
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},
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"fab_line_width": 0.09999999999999999,
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"fab_text_italic": false,
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"fab_text_size_h": 1.0,
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"fab_text_size_v": 1.0,
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"fab_text_thickness": 0.15,
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"fab_text_upright": false,
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"other_line_width": 0.15,
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"other_text_italic": false,
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"other_text_size_h": 1.0,
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"other_text_size_v": 1.0,
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"other_text_thickness": 0.15,
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"other_text_upright": false,
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"pads": {
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"drill": 0.762,
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"height": 1.524,
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"width": 1.524
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},
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"silk_line_width": 0.15,
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"silk_text_italic": false,
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"silk_text_size_h": 1.0,
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"silk_text_size_v": 1.0,
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"silk_text_thickness": 0.15
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"silk_text_thickness": 0.15,
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"silk_text_upright": false,
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"zones": {
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"45_degree_only": false,
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"min_clearance": 0.508
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}
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},
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"diff_pair_dimensions": [],
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"diff_pair_dimensions": [
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{
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"gap": 0.0,
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"via_gap": 0.0,
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"width": 0.0
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}
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],
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"drc_exclusions": [],
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"rules": {
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"min_copper_edge_clearance": 0.0,
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"solder_mask_clearance": 0.0,
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"solder_mask_min_width": 0.0
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"meta": {
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"version": 2
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},
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"track_widths": [],
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"via_dimensions": []
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"rule_severities": {
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"annular_width": "error",
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"clearance": "error",
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"copper_edge_clearance": "error",
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"courtyards_overlap": "error",
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"diff_pair_gap_out_of_range": "error",
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"diff_pair_uncoupled_length_too_long": "error",
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"drill_out_of_range": "error",
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"duplicate_footprints": "warning",
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"extra_footprint": "warning",
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"footprint_type_mismatch": "error",
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"hole_clearance": "error",
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"hole_near_hole": "error",
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"invalid_outline": "error",
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"item_on_disabled_layer": "error",
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"items_not_allowed": "error",
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"length_out_of_range": "error",
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"malformed_courtyard": "error",
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"microvia_drill_out_of_range": "error",
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"missing_courtyard": "ignore",
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"missing_footprint": "warning",
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"net_conflict": "warning",
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"npth_inside_courtyard": "ignore",
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"padstack": "error",
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"pth_inside_courtyard": "ignore",
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"shorting_items": "error",
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"silk_over_copper": "warning",
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"silk_overlap": "warning",
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"skew_out_of_range": "error",
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"through_hole_pad_without_hole": "error",
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"too_many_vias": "error",
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"track_dangling": "warning",
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"track_width": "error",
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"tracks_crossing": "error",
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"unconnected_items": "error",
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"unresolved_variable": "error",
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"via_dangling": "warning",
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"zone_has_empty_net": "error",
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"zones_intersect": "error"
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},
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"rules": {
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"allow_blind_buried_vias": false,
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"allow_microvias": false,
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"max_error": 0.005,
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"min_clearance": 0.0,
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"min_copper_edge_clearance": 0.0,
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"min_hole_clearance": 0.25,
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"min_hole_to_hole": 0.25,
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"min_microvia_diameter": 0.19999999999999998,
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"min_microvia_drill": 0.09999999999999999,
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"min_silk_clearance": 0.0,
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"min_through_hole_diameter": 0.3,
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"min_track_width": 0.19999999999999998,
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"min_via_annular_width": 0.049999999999999996,
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"min_via_diameter": 0.39999999999999997,
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"solder_mask_clearance": 0.0,
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"solder_mask_min_width": 0.0,
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"use_height_for_length_calcs": true
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},
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"track_widths": [
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0.0,
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0.5,
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0.75,
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1.5,
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2.0
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],
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"via_dimensions": [
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{
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"diameter": 0.0,
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"drill": 0.0
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}
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],
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"zones_allow_external_fillets": false,
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"zones_use_no_outline": true
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},
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"layer_presets": []
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},
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(footprint "ocxo" (version 20211014) (generator pcbnew)
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(layer "F.Cu")
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(tedit 0)
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(attr smd)
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(fp_text reference "REF**" (at 0 -0.5 unlocked) (layer "F.SilkS")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp 39a1d49e-6d49-4d86-bb5e-635e318ed6ed)
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)
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(fp_text value "ocxo" (at 0 1 unlocked) (layer "F.Fab")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp 3d263f95-2101-41bc-b955-d744ec7a7488)
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)
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(fp_line (start 13.335 12.7) (end -12.7 12.7) (layer "F.SilkS") (width 0.15) (tstamp 03d64575-149c-4621-9a27-88869a78cd8d))
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(fp_line (start -12.7 12.7) (end -12.7 -13.335) (layer "F.SilkS") (width 0.15) (tstamp 794ad8c8-3abc-4b8a-9f05-8fd411b6a2e0))
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(fp_line (start 10.16 -13.335) (end 13.335 -10.16) (layer "F.SilkS") (width 0.15) (tstamp 7d66dc19-2e64-41c2-ae51-dc1dfbb129e4))
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(fp_line (start 13.335 12.065) (end 13.335 12.7) (layer "F.SilkS") (width 0.15) (tstamp 82d2d71b-7325-4e2e-8b91-7aae13e9caeb))
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(fp_line (start 13.335 -10.16) (end 13.335 12.065) (layer "F.SilkS") (width 0.15) (tstamp a678f015-b850-4fa0-9c86-ac9d554097e2))
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(fp_line (start -12.7 -13.335) (end 10.16 -13.335) (layer "F.SilkS") (width 0.15) (tstamp df520f3d-8353-446c-938e-8c08f387e8f5))
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(pad "1" thru_hole rect (at 9.525 -9.525) (size 3 3) (drill 0.8) (layers *.Cu *.Mask) (tstamp 03f058ee-3d35-49b4-aeff-97819a0f53bb))
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(pad "2" thru_hole circle (at 0 -9.525) (size 3 3) (drill 0.8) (layers *.Cu *.Mask) (tstamp b1d10375-58df-49f6-bc69-b99993da3a57))
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(pad "3" thru_hole circle (at -9.525 -9.525) (size 3 3) (drill 0.8) (layers *.Cu *.Mask) (tstamp 9bec490c-2e39-4db7-9b92-81864551f051))
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(pad "4" thru_hole circle (at 9.525 9.525) (size 3 3) (drill 0.8) (layers *.Cu *.Mask) (tstamp c7e1153a-42e4-4fdc-8112-a3e6c57bc428))
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(pad "5" thru_hole circle (at -9.525 9.525) (size 3 3) (drill 0.8) (layers *.Cu *.Mask) (tstamp 8f81bdbf-04ed-4102-84d6-4afe8741619b))
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)
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