First draft for the split ground pcb

This commit is contained in:
Sebastian 2015-05-22 15:03:20 +02:00
parent 20dfbe57de
commit d2bf4f900d
15 changed files with 1215 additions and 218 deletions

56
hardware/libs/mfsop6.mod Normal file
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@ -0,0 +1,56 @@
PCBNEW-LibModule-V1 Fri 22 May 2015 01:29:03 PM CEST
# encoding utf-8
Units mm
$INDEX
mfsop6
$EndINDEX
$MODULE mfsop6
Po 0 0 0 15 555F12B0 00000000 ~~
Li mfsop6
Cd Mini flat package, 4 pin
Sc 0
AR /555DB3D8
Op 0 0 0
T0 0 -5 1 1 0 0.2 N V 21 N "IC3"
T1 0 5.1 1 1 0 0.2 N V 21 N "LTV-352T"
DS -1.905 1.905 -1.905 -1.905 0.25 21
DS -1.905 -1.905 1.905 -1.905 0.25 21
DS 1.905 -1.905 1.905 1.905 0.25 21
DS 1.905 1.905 -1.905 1.905 0.25 21
DC -1.235 1.5 -1.435 1.7 0.25 21
$PAD
Sh "1" R 0.61 1.52 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 2 "N-000004"
Po -1.27 3.175
$EndPAD
$PAD
Sh "3" R 0.61 1.52 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1.27 3.175
$EndPAD
$PAD
Sh "4" R 0.61 1.52 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 3 "TXD"
Po 1.27 -3.175
$EndPAD
$PAD
Sh "6" R 0.61 1.52 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 1 "BUS_GND"
Po -1.27 -3.175
$EndPAD
$SHAPE3D
Na "walter/smd_dil/mfp-4.wrl"
Sc 1 1 1
Of 0 0 0
Ro 0 0 0
$EndSHAPE3D
$EndMODULE mfsop6
$EndLIBRARY

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EESchema-LIBRARY Version 2.3 Date: Thu 21 May 2015 06:41:40 PM CEST
EESchema-LIBRARY Version 2.3 Date: Fri 22 May 2015 12:04:05 PM CEST
#encoding utf-8
#
# +5V

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@ -1,4 +1,4 @@
Cmp-Mod V01 Created by CvPcb (2013-may-18)-stable date = Thu 21 May 2015 04:14:00 PM CEST
Cmp-Mod V01 Created by CvPcb (2013-may-18)-stable date = Fri 22 May 2015 12:10:17 PM CEST
BeginCmp
TimeStamp = /5557C4CE;
@ -95,14 +95,14 @@ BeginCmp
TimeStamp = /555DB3E7;
Reference = IC2;
ValeurCmp = LTV-352T;
IdModule = mfp_4;
IdModule = mfsop6;
EndCmp
BeginCmp
TimeStamp = /555DB3D8;
Reference = IC3;
ValeurCmp = LTV-352T;
IdModule = mfp_4;
IdModule = mfsop6;
EndCmp
BeginCmp

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@ -1,7 +1,7 @@
(export (version D)
(design
(source /home/sebastian/projects/seidenstrasse/modems/hardware/sss7modem.sch)
(date "Thu 21 May 2015 03:25:53 PM CEST")
(date "Fri 22 May 2015 12:04:14 PM CEST")
(tool "eeschema (2013-may-18)-stable"))
(components
(comp (ref R3)
@ -335,10 +335,10 @@
(uri /usr/share/kicad/library/interface.lib))
(library (logical opto)
(uri /usr/share/kicad/library/opto.lib))
(library (logical dcdc)
(uri libs/dcdc.lib))
(library (logical 74hct125)
(uri libs/74hct125.lib)))
(uri libs/74hct125.lib))
(library (logical dcdc)
(uri libs/dcdc.lib)))
(nets
(net (code 1) (name BUS_GND)
(node (ref D6) (pin 1))
@ -390,13 +390,13 @@
(node (ref U2) (pin 5)))
(net (code 9) (name RXDout)
(node (ref U2) (pin 6))
(node (ref P1) (pin 2)))
(node (ref P1) (pin 3)))
(net (code 10) (name TXDin)
(node (ref U2) (pin 2))
(node (ref P1) (pin 3)))
(node (ref P1) (pin 2)))
(net (code 11) (name +5V)
(node (ref P1) (pin 4))
(node (ref R6) (pin 1))
(node (ref P1) (pin 4))
(node (ref C1) (pin 1))
(node (ref C2) (pin 1))
(node (ref R7) (pin 1))

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@ -1,6 +1,6 @@
update=Thu 21 May 2015 04:14:20 PM CEST
update=Fri 22 May 2015 12:10:08 PM CEST
version=1
last_client=pcbnew
last_client=cvpcb
[general]
version=1
[eeschema]
@ -44,11 +44,6 @@ LibName29=contrib
LibName30=valves
LibName31=dcdc
LibName32=74hct125
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[pcbnew]
version=1
LastNetListRead=sss7modem.net
@ -69,7 +64,6 @@ DrawSegmentWidth=" 0.200000"
BoardOutlineThickness=" 0.100000"
ModuleOutlineThickness=" 0.150000"
[pcbnew/libraries]
LibDir=
LibName1=sockets
LibName2=connect
LibName3=discret
@ -88,3 +82,10 @@ LibName15=pga_sockets
LibName16=valves
LibName17=libs/smisitoto_eu/w_smd_diode
LibName18=libs/smisitoto_eu/w_smd_dil
LibName19=libs/mfsop6
LibDir=
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms

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@ -774,9 +774,9 @@ Wire Wire Line
2900 3550 2900 3600
Wire Wire Line
2900 3600 3100 3600
Text GLabel 3100 3400 2 60 Input ~ 0
TXDin
Text GLabel 3100 3600 2 60 Input ~ 0
TXDin
Text GLabel 3100 3400 2 60 Input ~ 0
RXDout
Text Notes 7550 900 0 197 ~ 0
Bus side