sebastian
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kaboard
mirror of https://github.com/LongHairedHacker/kaboard.git
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merge branch 'master' of github.com:LongHairedHacker/kaboard 

Conflicts:
	kaboard.000
	kaboard.brd
	kaboard.cmp
	kaboard_panelized.000
	kaboard_panelized.brd
	plot/panelized_v1.0/kaboard_panelized-B_Mask.gbs
	plot/panelized_v1.0/kaboard_panelized-B_SilkS.gbo
	plot/panelized_v1.0/kaboard_panelized-F_Mask.gts
	plot/panelized_v1.0/kaboard_panelized-F_SilkS.gto
This commit is contained in:
sebastian 2013-01-10 19:57:54 +01:00
parent b210c482f1 097131455c
commit 3b2061e132
39 changed files with 51016 additions and 5334 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
README.md
View File

@ -12,6 +12,7 @@ It's main features are :
* All mcu pins broken out on pin headers
* Vcc and GND pins near every mcu pin, usefull for supplying power to peripherials or for pullups or pulldowns
* ft232rl serial to USB konverter
* It is not Arduino compatible
The components on the board were selected mostly, because they are cheap and easily obtianable at my local distributor.
One exception is the ft232rl.

23
ft232rl_usb.bak
View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Thu 13 Dec 2012 03:52:15 PM CET
EESchema Schematic File Version 2 date Thu 10 Jan 2013 10:04:57 AM CET
LIBS:power
LIBS:device
LIBS:transistors
@ -37,7 +37,7 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 2 2
Title ""
Date "13 dec 2012"
Date "10 jan 2013"
Rev ""
Comp ""
Comment1 ""
@ -72,7 +72,7 @@ F 1 "INDUCTOR" V 3950 2950 40 0000 C CNN
1 3850 2950
0 -1 -1 0
$EndComp
Text GLabel 8150 3400 2 60 Output ~ 0
Text GLabel 8550 3400 2 60 Output ~ 0
RESET
$Comp
L FT232RL U1
@ -124,7 +124,7 @@ L CP1 C7
U 1 1 4F9D91CA
P 1800 3450
F 0 "C7" H 1850 3550 50 0000 L CNN
F 1 "4,7uF tantal" H 1300 3300 50 0000 L CNN
F 1 "4,7uF" H 1850 3300 50 0000 L CNN
1 1800 3450
1 0 0 -1
$EndComp
@ -301,8 +301,6 @@ Wire Wire Line
Connection ~ 3350 3900
Wire Wire Line
3350 2950 3350 4550
Wire Wire Line
8150 3400 7850 3400
Connection ~ 9300 2800
Wire Wire Line
9300 2800 9300 2450
@ -510,4 +508,17 @@ Wire Wire Line
3600 1150 3600 750
Wire Wire Line
3600 750 3800 750
$Comp
L C C13
U 1 1 50EE8982
P 8250 3400
F 0 "C13" H 8300 3500 50 0000 L CNN
F 1 "100nf" H 8300 3300 50 0000 L CNN
1 8250 3400
0 -1 1 0
$EndComp
Wire Wire Line
7850 3400 8050 3400
Wire Wire Line
8450 3400 8550 3400
$EndSCHEMATC

73
ft232rl_usb.sch
View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Thu 13 Dec 2012 04:01:05 PM CET
EESchema Schematic File Version 2 date Thu 10 Jan 2013 10:06:40 AM CET
LIBS:power
LIBS:device
LIBS:transistors
@ -36,9 +36,9 @@ EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 2 2
Title ""
Date "13 dec 2012"
Rev ""
Title "Kaboard"
Date "10 jan 2013"
Rev "1.1"
Comp ""
Comment1 ""
Comment2 ""
@ -72,7 +72,7 @@ F 1 "INDUCTOR" V 3950 2950 40 0000 C CNN
1 3850 2950
0 -1 -1 0
$EndComp
Text GLabel 8150 3400 2 60 Output ~ 0
Text GLabel 8550 3400 2 60 Output ~ 0
RESET
$Comp
L FT232RL U1
@ -93,10 +93,10 @@ F 1 "USB" V 4100 3850 60 0000 C CNN
1 0 0 -1
$EndComp
$Comp
L GND #PWR015
L GND #PWR19
U 1 1 4F9D8FC2
P 4700 4600
F 0 "#PWR015" H 4700 4600 30 0001 C CNN
F 0 "#PWR19" H 4700 4600 30 0001 C CNN
F 1 "GND" H 4700 4530 30 0001 C CNN
1 4700 4600
1 0 0 -1
@ -129,46 +129,46 @@ F 1 "4,7uF" H 1850 3300 50 0000 L CNN
1 0 0 -1
$EndComp
$Comp
L GND #PWR016
L GND #PWR16
U 1 1 4F9D9229
P 2100 4050
F 0 "#PWR016" H 2100 4050 30 0001 C CNN
F 0 "#PWR16" H 2100 4050 30 0001 C CNN
F 1 "GND" H 2100 3980 30 0001 C CNN
1 2100 4050
1 0 0 -1
$EndComp
$Comp
L +5V #PWR017
L +5V #PWR15
U 1 1 4F9D92D1
P 2100 2850
F 0 "#PWR017" H 2100 2940 20 0001 C CNN
F 0 "#PWR15" H 2100 2940 20 0001 C CNN
F 1 "+5V" H 2100 2940 30 0000 C CNN
1 2100 2850
1 0 0 -1
$EndComp
$Comp
L +5V #PWR018
L +5V #PWR20
U 1 1 4F9D92E0
P 5600 2650
F 0 "#PWR018" H 5600 2740 20 0001 C CNN
F 0 "#PWR20" H 5600 2740 20 0001 C CNN
F 1 "+5V" H 5600 2740 30 0000 C CNN
1 5600 2650
1 0 0 -1
$EndComp
$Comp
L GND #PWR019
L GND #PWR18
U 1 1 4F9D92EF
P 3950 4600
F 0 "#PWR019" H 3950 4600 30 0001 C CNN
F 0 "#PWR18" H 3950 4600 30 0001 C CNN
F 1 "GND" H 3950 4530 30 0001 C CNN
1 3950 4600
1 0 0 -1
$EndComp
$Comp
L GND #PWR020
L GND #PWR24
U 1 1 4F9D9414
P 6950 5150
F 0 "#PWR020" H 6950 5150 30 0001 C CNN
F 0 "#PWR24" H 6950 5150 30 0001 C CNN
F 1 "GND" H 6950 5080 30 0001 C CNN
1 6950 5150
1 0 0 -1
@ -192,10 +192,10 @@ F 1 "10k" V 3350 5400 50 0000 C CNN
1 0 0 -1
$EndComp
$Comp
L GND #PWR021
L GND #PWR17
U 1 1 4F9D9739
P 3350 5750
F 0 "#PWR021" H 3350 5750 30 0001 C CNN
F 0 "#PWR17" H 3350 5750 30 0001 C CNN
F 1 "GND" H 3350 5680 30 0001 C CNN
1 3350 5750
1 0 0 -1
@ -210,10 +210,10 @@ F 1 "100nF" H 5700 4450 50 0000 L CNN
1 0 0 -1
$EndComp
$Comp
L GND #PWR022
L GND #PWR21
U 1 1 4F9D9860
P 5650 5150
F 0 "#PWR022" H 5650 5150 30 0001 C CNN
F 0 "#PWR21" H 5650 5150 30 0001 C CNN
F 1 "GND" H 5650 5080 30 0001 C CNN
1 5650 5150
1 0 0 -1
@ -255,10 +255,10 @@ F 1 "LED" H 9500 2900 50 0000 C CNN
0 1 1 0
$EndComp
$Comp
L +5V #PWR023
L +5V #PWR25
U 1 1 4F9D9CC7
P 9300 2450
F 0 "#PWR023" H 9300 2540 20 0001 C CNN
F 0 "#PWR25" H 9300 2540 20 0001 C CNN
F 1 "+5V" H 9300 2540 30 0000 C CNN
1 9300 2450
1 0 0 -1
@ -301,8 +301,6 @@ Wire Wire Line
Connection ~ 3350 3900
Wire Wire Line
3350 2950 3350 4550
Wire Wire Line
8150 3400 7850 3400
Connection ~ 9300 2800
Wire Wire Line
9300 2800 9300 2450
@ -448,10 +446,10 @@ Wire Wire Line
5800 1850 5800 1700
Connection ~ 5800 1150
$Comp
L +5V #PWR024
L +5V #PWR22
U 1 1 50C4B5BF
P 5800 850
F 0 "#PWR024" H 5800 940 20 0001 C CNN
F 0 "#PWR22" H 5800 940 20 0001 C CNN
F 1 "+5V" H 5800 940 30 0000 C CNN
1 5800 850
1 0 0 -1
@ -463,10 +461,10 @@ Connection ~ 4000 2250
Connection ~ 4650 2250
Connection ~ 5350 2250
$Comp
L GND #PWR025
L GND #PWR23
U 1 1 50C4B798
P 5800 2500
F 0 "#PWR025" H 5800 2500 30 0001 C CNN
F 0 "#PWR23" H 5800 2500 30 0001 C CNN
F 1 "GND" H 5800 2430 30 0001 C CNN
1 5800 2500
1 0 0 -1
@ -485,10 +483,10 @@ F 1 "LM1117" H 4000 1400 60 0000 C CNN
1 0 0 -1
$EndComp
$Comp
L +5V #PWR026
L +5V #PWR26
U 1 1 50C4BDF6
P 10150 300
F 0 "#PWR026" H 10150 390 20 0001 C CNN
F 0 "#PWR26" H 10150 390 20 0001 C CNN
F 1 "+5V" H 10150 390 30 0000 C CNN
1 10150 300
1 0 0 -1
@ -510,4 +508,17 @@ Wire Wire Line
3600 1150 3600 750
Wire Wire Line
3600 750 3800 750
$Comp
L C C13
U 1 1 50EE8982
P 8250 3400
F 0 "C13" H 8300 3500 50 0000 L CNN
F 1 "100nf" H 8300 3300 50 0000 L CNN
1 8250 3400
0 -1 1 0
$EndComp
Wire Wire Line
7850 3400 8050 3400
Wire Wire Line
8450 3400 8550 3400
$EndSCHEMATC

2
kaboard-cache.lib
View File

@ -1,4 +1,4 @@
EESchema-LIBRARY Version 2.3 Date: Thu 13 Dec 2012 04:01:05 PM CET
EESchema-LIBRARY Version 2.3 Date: Thu 10 Jan 2013 10:06:40 AM CET
#encoding utf-8
#
# +5V

3055
kaboard.000
View File

File diff suppressed because it is too large Load Diff

22
kaboard.bak
View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Thu 13 Dec 2012 03:52:15 PM CET
EESchema Schematic File Version 2 date Thu 10 Jan 2013 10:04:57 AM CET
LIBS:power
LIBS:device
LIBS:transistors
@ -37,7 +37,7 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 1 2
Title ""
Date "13 dec 2012"
Date "10 jan 2013"
Rev ""
Comp ""
Comment1 ""
@ -87,9 +87,6 @@ Wire Wire Line
6550 5350 7950 5350
Wire Wire Line
7850 4700 7700 4700
Connection ~ 7700 5150
Wire Wire Line
7700 4700 7700 5150
Wire Wire Line
6550 5750 6650 5750
Wire Wire Line
@ -153,9 +150,9 @@ Wire Wire Line
5550 2750 5550 3350
Connection ~ 5550 3250
Wire Wire Line
3550 5150 3550 4050
3550 4050 3550 5150
Wire Wire Line
1850 5150 3550 5150
3550 5150 1850 5150
Wire Wire Line
3050 4650 3050 4550
Wire Wire Line
@ -181,9 +178,6 @@ Wire Wire Line
7950 5250 6550 5250
Wire Wire Line
6550 5650 6650 5650
Wire Wire Line
7500 5050 7500 4500
Connection ~ 7500 5050
Wire Wire Line
7500 4500 7850 4500
Wire Wire Line
@ -356,7 +350,7 @@ F 1 "CONN_6" V 7950 3900 60 0000 C CNN
1 7900 3900
-1 0 0 1
$EndComp
Text GLabel 7850 4500 2 60 Input ~ 0
Text GLabel 7850 4500 2 60 Output ~ 0
RXD
Text GLabel 7850 4700 2 60 Input ~ 0
TXD
@ -586,4 +580,10 @@ MOSI
Wire Wire Line
7050 3950 7050 3450
Connection ~ 7050 3950
Wire Wire Line
7500 5150 7500 4500
Connection ~ 7500 5150
Wire Wire Line
7700 4700 7700 5050
Connection ~ 7700 5050
$EndSCHEMATC

2851
kaboard.brd
View File

File diff suppressed because it is too large Load Diff

9
kaboard.cmp
View File

@ -1,4 +1,4 @@
Cmp-Mod V01 Created by CvPcb (2012-10-13 BZR 3765)-stable date = Tue 18 Dec 2012 05:51:08 PM CET
Cmp-Mod V01 Created by CvPcb (2012-12-10 BZR 3844)-stable date = Thu 10 Jan 2013 10:07:29 AM CET
BeginCmp
TimeStamp = /5069B992;
@ -84,6 +84,13 @@ ValeurCmp = 100nF;
IdModule = SM0603;
EndCmp
BeginCmp
TimeStamp = /5069AFCC/50EE8982;
Reference = C13;
ValeurCmp = 100nf;
IdModule = SM0603;
EndCmp
BeginCmp
TimeStamp = /5069AFCC/50C4B496;
Reference = D1;

43
kaboard.csv
View File

@ -1,21 +1,22 @@
22pF 2 "C4 C5"
100nF 7 "C1 C2 C3 C8 C9 C10 C12"
4,7uF tantal 1 "C7"
10uF tantal 2 "C6 C11"
LED 3 "D1 D6 D7"
BAT42W 1 "D2"
ATMEGA8-P 1 "IC1"
USB 1 "J1"
JUMPER 3 "JP1 JP2 JP3"
CONN_3 3 "K1 K2 K3"
INDUCTOR 1 "L1"
CONN_6 6 "P1 P2 P3 P4 P6 P8"
CONN_5 3 "P5 P7 P9"
CONN_2 1 "P10"
1k 3 "R2 R10 R11"
4,7k 1 "R8"
10k 2 "R1 R9"
SW_PUSH 1 "SW1"
FT232RL 1 "U1"
LM1117 1 "U2"
CRYSTAL 1 "X1"
22pF 2 "C4 C5"
100nF 7 "C1 C2 C3 C8 C9 C10 C12"
4,7uF 1 "C7"
10uF 2 "C6 C11"
LED 3 "D1 D6 D7"
BAT42W 1 "D2"
ATMEGA8-P 1 "IC1"
USB 1 "J1"
JUMPER 3 "JP1 JP2 JP3"
CONN_3 3 "K1 K2 K3"
INDUCTOR 1 "L1"
CONN_6 6 "P1 P2 P3 P4 P6 P8"
CONN_5 3 "P5 P7 P9"
CONN_2 1 "P10"
CONN_3X2 1 "P11"
1k 3 "R2 R10 R11"
4,7k 1 "R8"
10k 2 "R1 R9"
SW_PUSH 1 "SW1"
FT232RL 1 "U1"
LM1117 1 "U2"
CRYSTAL 1 "X1"

1 22pF 22pF 2 2 C4 C5
2 100nF 100nF 7 7 C1 C2 C3 C8 C9 C10 C12
3 4,7uF tantal 4,7uF 1 1 C7
4 10uF tantal 10uF 2 2 C6 C11
5 LED LED 3 3 D1 D6 D7
6 BAT42W BAT42W 1 1 D2
7 ATMEGA8-P ATMEGA8-P 1 1 IC1
8 USB USB 1 1 J1
9 JUMPER JUMPER 3 3 JP1 JP2 JP3
10 CONN_3 CONN_3 3 3 K1 K2 K3
11 INDUCTOR INDUCTOR 1 1 L1
12 CONN_6 CONN_6 6 6 P1 P2 P3 P4 P6 P8
13 CONN_5 CONN_5 3 3 P5 P7 P9
14 CONN_2 CONN_2 1 1 P10
15 1k CONN_3X2 3 1 R2 R10 R11 P11
16 4,7k 1k 1 3 R8 R2 R10 R11
17 10k 4,7k 2 1 R1 R9 R8
18 SW_PUSH 10k 1 2 SW1 R1 R9
19 FT232RL SW_PUSH 1 1 U1 SW1
20 LM1117 FT232RL 1 1 U2 U1
21 CRYSTAL LM1117 1 1 X1 U2
22 CRYSTAL 1 X1

472
kaboard.net
View File

@ -1,4 +1,4 @@
# EESchema Netlist Version 1.1 created Thu 13 Dec 2012 04:01:13 PM CET
# EESchema Netlist Version 1.1 created Thu 10 Jan 2013 10:03:49 AM CET
(
( /5069D40C $noname K2 CONN_3 {Lib=CONN_3}
( 1 +5V )
@ -57,29 +57,29 @@
( 6 +5V )
)
( /5069CE9B $noname P5 CONN_5 {Lib=CONN_5}
( 1 RXD )
( 2 TXD )
( 3 N-000010 )
( 4 N-000009 )
( 5 N-000008 )
( 1 TXD )
( 2 RXD )
( 3 N-000012 )
( 4 N-000011 )
( 5 N-000006 )
)
( /5069CEA2 $noname K1 CONN_3 {Lib=CONN_3}
( 1 N-000013 )
( 2 N-000015 )
( 3 N-000016 )
( 1 N-000009 )
( 2 N-000007 )
( 3 N-000017 )
)
( /5069CE8A $noname P2 CONN_6 {Lib=CONN_6}
( 1 N-000017 )
( 2 N-000019 )
( 3 N-000021 )
( 4 N-000023 )
( 5 N-000024 )
( 6 N-000003 )
)
( /5069CE7E $noname P1 CONN_6 {Lib=CONN_6}
( 1 N-000018 )
( 2 N-000020 )
( 3 N-000022 )
( 4 N-000024 )
( 5 N-000025 )
( 6 N-000026 )
)
( /5069CE7E $noname P1 CONN_6 {Lib=CONN_6}
( 1 N-000019 )
( 2 N-000021 )
( 3 N-000023 )
( 4 MOSI )
( 5 MISO )
( 6 SCK )
@ -94,7 +94,7 @@
)
( /5069B88A $noname JP1 JUMPER {Lib=JUMPER}
( 1 N-000001 )
( 2 N-000014 )
( 2 N-000008 )
)
( /5069B78F $noname SW1 SW_PUSH {Lib=SW_PUSH}
( 1 GND )
@ -110,45 +110,45 @@
)
( /5069B4CA $noname C5 22pF {Lib=C}
( 1 GND )
( 2 N-000011 )
( 2 N-000015 )
)
( /5069B4C5 $noname C4 22pF {Lib=C}
( 1 GND )
( 2 N-000012 )
( 2 N-000016 )
)
( /5069B48D $noname X1 CRYSTAL {Lib=CRYSTAL}
( 1 N-000012 )
( 2 N-000011 )
( 1 N-000016 )
( 2 N-000015 )
)
( /5069B452 DIL28 IC1 ATMEGA8-P {Lib=ATMEGA8-P}
( 1 RESET )
( 2 RXD )
( 3 TXD )
( 4 N-000010 )
( 5 N-000009 )
( 6 N-000008 )
( 2 TXD )
( 3 RXD )
( 4 N-000012 )
( 5 N-000011 )
( 6 N-000006 )
( 7 +5V )
( 8 GND )
( 9 N-000012 )
( 10 N-000011 )
( 11 N-000013 )
( 12 N-000015 )
( 13 N-000016 )
( 14 N-000018 )
( 15 N-000020 )
( 16 N-000022 )
( 9 N-000016 )
( 10 N-000015 )
( 11 N-000009 )
( 12 N-000007 )
( 13 N-000017 )
( 14 N-000019 )
( 15 N-000021 )
( 16 N-000023 )
( 17 MOSI )
( 18 MISO )
( 19 SCK )
( 20 +5V )
( 21 N-000014 )
( 21 N-000008 )
( 22 GND )
( 23 N-000017 )
( 24 N-000019 )
( 25 N-000021 )
( 26 N-000023 )
( 27 N-000024 )
( 28 N-000003 )
( 23 N-000018 )
( 24 N-000020 )
( 25 N-000022 )
( 26 N-000024 )
( 27 N-000025 )
( 28 N-000026 )
)
( /50C6F989 $noname P11 CONN_3X2 {Lib=CONN_3X2}
( 1 MISO )
@ -159,20 +159,20 @@
( 6 GND )
)
( /5069AFCC/5069B18D $noname JP2 JUMPER {Lib=JUMPER}
( 1 N-000043 )
( 2 N-000036 )
( 1 N-000042 )
( 2 N-000033 )
)
( /5069AFCC/5069B17A $noname JP3 JUMPER {Lib=JUMPER}
( 1 N-000044 )
( 1 N-000043 )
( 2 +5V )
)
( /5069AFCC/5069B154 $noname L1 INDUCTOR {Lib=INDUCTOR}
( 1 N-000028 )
( 2 N-000044 )
( 1 N-000030 )
( 2 N-000043 )
)
( /5069AFCC/4F9D8EBB $noname U1 FT232RL {Lib=FT232RL}
( 1 TXD )
( 2 RESET )
( 2 N-000037 )
( 3 ? )
( 4 +5V )
( 5 RXD )
@ -184,24 +184,24 @@
( 12 ? )
( 13 ? )
( 14 ? )
( 15 N-000030 )
( 16 N-000029 )
( 15 N-000029 )
( 16 N-000028 )
( 17 N-000035 )
( 18 GND )
( 19 N-000036 )
( 19 N-000033 )
( 20 +5V )
( 21 GND )
( 22 N-000034 )
( 23 N-000033 )
( 23 N-000032 )
( 25 GND )
( 26 GND )
( 27 ? )
( 28 ? )
)
( /5069AFCC/4F9D8ECA $noname J1 USB {Lib=USB}
( 1 N-000028 )
( 2 N-000029 )
( 3 N-000030 )
( 1 N-000030 )
( 2 N-000028 )
( 3 N-000029 )
( 4 GND )
( 5 GND )
( 6 GND )
@ -219,11 +219,11 @@
( 2 GND )
)
( /5069AFCC/4F9D95ED $noname R8 4,7k {Lib=R}
( 1 N-000028 )
( 2 N-000043 )
( 1 N-000030 )
( 2 N-000042 )
)
( /5069AFCC/4F9D95FC $noname R9 10k {Lib=R}
( 1 N-000043 )
( 1 N-000042 )
( 2 GND )
)
( /5069AFCC/4F9D979D $noname C10 100nF {Lib=C}
@ -231,23 +231,23 @@
( 2 GND )
)
( /5069AFCC/4F9D991D $noname R10 1k {Lib=R}
( 1 N-000031 )
( 2 N-000033 )
( 1 N-000051 )
( 2 N-000032 )
)
( /5069AFCC/4F9D992C $noname R11 1k {Lib=R}
( 1 N-000032 )
( 1 N-000052 )
( 2 N-000034 )
)
( /5069AFCC/4F9D9AAB $noname D6 LED {Lib=LED}
( 1 +5V )
( 2 N-000031 )
( 2 N-000051 )
)
( /5069AFCC/4F9D9ABA $noname D7 LED {Lib=LED}
( 1 +5V )
( 2 N-000032 )
( 2 N-000052 )
)
( /5069AFCC/50C4AE4A $noname C6 10uF {Lib=CP1}
( 1 N-000038 )
( 1 N-000031 )
( 2 GND )
)
( /5069AFCC/50C4AE59 $noname C11 10uF {Lib=CP1}
@ -260,25 +260,29 @@
)
( /5069AFCC/50C4B3A1 $noname P10 CONN_2 {Lib=CONN_2}
( 1 GND )
( 2 N-000038 )
( 2 N-000031 )
)
( /5069AFCC/50C4B487 $noname R2 1k {Lib=R}
( 1 +5V )
( 2 N-000039 )
( 2 N-000038 )
)
( /5069AFCC/50C4B496 $noname D1 LED {Lib=LED}
( 1 N-000039 )
( 1 N-000038 )
( 2 GND )
)
( /5069AFCC/50C4BBB3 $noname U2 LM1117 {Lib=LM1117}
( 1 GND )
( 2 +5V )
( 3 N-000038 )
( 3 N-000031 )
( 4 ? )
)
( /5069AFCC/50C4BF42 $noname D2 BAT42W {Lib=DIODE}
( 1 +5V )
( 2 N-000038 )
( 2 N-000031 )
)
( /5069AFCC/50EE8982 $noname C13 100nf {Lib=C}
( 1 N-000037 )
( 2 RESET )
)
)
*
@ -417,225 +421,233 @@ $component D2
D?
S*
$endlist
$component C13
SM*
C?
C1-1
$endlist
$endfootprintlist
}
{ Pin List by Nets
Net 1 "" ""
C3 1
JP1 1
Net 2 "RESET" "RESET"
R1 2
U1 2
Net 2 "MISO" "MISO"
IC1 18
P1 5
P11 1
Net 3 "SCK" "SCK"
IC1 19
P11 3
P1 6
Net 4 "RESET" "RESET"
SW1 2
C1 1
C13 2
P11 5
IC1 1
Net 3 "" ""
P2 6
IC1 28
Net 4 "SCK" "SCK"
P1 6
P11 3
IC1 19
Net 5 "MISO" "MISO"
P1 5
IC1 18
P11 1
Net 6 "MOSI" "MOSI"
C1 1
R1 2
Net 5 "MOSI" "MOSI"
P11 4
P1 4
IC1 17
Net 7 "GND" "GND"
U1 25
U1 26
IC1 22
K3 2
U1 18
P10 1
K3 1
C8 2
U1 7
U1 21
C9 2
J1 4
U2 1
P9 5
P1 4
Net 6 "" ""
P5 5
IC1 6
Net 7 "" ""
IC1 12
K1 2
Net 8 "" ""
JP1 2
IC1 21
Net 9 "" ""
IC1 11
K1 1
Net 10 "GND" "GND"
K3 3
J1 5
J1 6
P9 4
P8 4
C6 2
U1 21
U1 7
C7 2
C8 2
C9 2
K3 2
P9 3
P9 2
P9 1
U2 1
P8 1
J1 6
J1 5
J1 4
U1 18
P9 5
U1 26
U1 25
D1 2
K3 1
P8 2
P8 3
P10 1
SW1 1
C11 2
C3 2
P8 6
P8 5
C2 2
C1 2
P11 6
IC1 22
C12 2
IC1 8
C4 1
P4 6
C5 1
P4 5
P4 4
P4 3
P4 2
P4 1
R9 2
P8 6
P8 5
P8 4
P8 3
P8 2
P8 1
P9 4
P9 3
P9 2
P9 1
C5 1
C10 2
C1 2
SW1 1
C2 2
C3 2
IC1 8
C7 2
P11 6
C12 2
P4 4
C11 2
D1 2
C4 1
P4 5
P4 6
Net 8 "" ""
P5 5
IC1 6
Net 9 "" ""
IC1 5
Net 11 "" ""
P5 4
Net 10 "" ""
IC1 5
Net 12 "" ""
IC1 4
P5 3
Net 11 "" ""
Net 13 "RXD" "RXD"
P5 2
U1 5
IC1 3
Net 14 "TXD" "TXD"
P5 1
U1 1
IC1 2
Net 15 "" ""
C5 2
X1 2
IC1 10
C5 2
Net 12 "" ""
IC1 9
Net 16 "" ""
X1 1
C4 2
Net 13 "" ""
K1 1
IC1 11
Net 14 "" ""
IC1 21
JP1 2
Net 15 "" ""
IC1 12
K1 2
Net 16 "" ""
IC1 13
K1 3
IC1 9
Net 17 "" ""
K1 3
IC1 13
Net 18 "" ""
IC1 23
P2 1
Net 18 "" ""
P1 1
IC1 14
Net 19 "" ""
P2 2
IC1 24
IC1 14
P1 1
Net 20 "" ""
P1 2
IC1 15
IC1 24
P2 2
Net 21 "" ""
P2 3
IC1 25
IC1 15
P1 2
Net 22 "" ""
IC1 25
P2 3
Net 23 "" ""
IC1 16
P1 3
Net 23 "" ""
P2 4
IC1 26
Net 24 "" ""
IC1 27
IC1 26
P2 4
Net 25 "" ""
P2 5
Net 25 "TXD" "TXD"
U1 1
P5 2
IC1 3
Net 26 "+5V" "+5V"
C12 1
C11 1
P7 3
D2 1
R2 1
IC1 27
Net 26 "" ""
IC1 28
P2 6
Net 27 "+5V" "+5V"
U2 2
C9 1
C8 1
JP3 2
U1 4
C7 1
U1 20
D6 1
D7 1
P7 1
K2 3
IC1 20
IC1 7
K2 2
P11 2
P7 2
P7 4
P6 1
P6 2
P6 3
P6 4
P6 6
P7 5
D7 1
D6 1
C11 1
U1 20
C12 1
U1 4
JP3 2
C7 1
C8 1
C9 1
R2 1
D2 1
K2 3
K2 2
K2 1
P3 1
P3 2
IC1 20
P7 1
P7 2
P3 6
P7 3
P7 4
P7 5
P3 5
P6 2
P6 4
P6 5
P6 1
P11 2
IC1 7
P3 2
P3 4
P3 1
C2 1
R1 1
P3 6
P3 4
P3 5
P3 3
Net 27 "RXD" "RXD"
IC1 2
P5 1
U1 5
P6 6
Net 28 "" ""
L1 1
R8 1
J1 1
Net 29 "" ""
J1 2
U1 16
Net 30 "" ""
U1 15
Net 29 "" ""
J1 3
U1 15
Net 30 "" ""
J1 1
R8 1
L1 1
Net 31 "" ""
R10 1
D6 2
C6 1
D2 2
P10 2
U2 3
Net 32 "" ""
R11 1
D7 2
Net 33 "" ""
R10 2
U1 23
Net 34 "" ""
U1 22
R11 2
Net 35 "" ""
U1 17
C10 1
Net 36 "" ""
JP2 2
Net 33 "" ""
U1 19
JP2 2
Net 34 "" ""
R11 2
U1 22
Net 35 "" ""
C10 1
U1 17
Net 37 "" ""
U1 2
C13 1
Net 38 "" ""
P10 2
D2 2
U2 3
C6 1
Net 39 "" ""
D1 1
R2 2
Net 43 "" ""
D1 1
Net 42 "" ""
R9 1
R8 2
JP2 1
Net 44 "" ""
Net 43 "" ""
JP3 1
L1 2
Net 51 "" ""
D6 2
R10 1
Net 52 "" ""
D7 2
R11 1
}
#End

78
kaboard.sch
View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Thu 13 Dec 2012 04:01:05 PM CET
EESchema Schematic File Version 2 date Thu 10 Jan 2013 10:06:40 AM CET
LIBS:power
LIBS:device
LIBS:transistors
@ -36,9 +36,9 @@ EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 2
Title ""
Date "13 dec 2012"
Rev ""
Title "Kaboard"
Date "10 jan 2013"
Rev "1.1"
Comp ""
Comment1 ""
Comment2 ""
@ -87,9 +87,6 @@ Wire Wire Line
6550 5350 7950 5350
Wire Wire Line
7850 4700 7700 4700
Connection ~ 7700 5150
Wire Wire Line
7700 4700 7700 5150
Wire Wire Line
6550 5750 6650 5750
Wire Wire Line
@ -181,9 +178,6 @@ Wire Wire Line
7950 5250 6550 5250
Wire Wire Line
6550 5650 6650 5650
Wire Wire Line
7500 5050 7500 4500
Connection ~ 7500 5050
Wire Wire Line
7500 4500 7850 4500
Wire Wire Line
@ -204,28 +198,28 @@ Connection ~ 8300 5900
Text GLabel 1750 3650 0 60 Input ~ 0
RESET
$Comp
L +5V #PWR01
L +5V #PWR1
U 1 1 5069D445
P 2100 2850
F 0 "#PWR01" H 2100 2940 20 0001 C CNN
F 0 "#PWR1" H 2100 2940 20 0001 C CNN
F 1 "+5V" H 2100 2940 30 0000 C CNN
1 2100 2850
1 0 0 -1
$EndComp
$Comp
L +5V #PWR02
L +5V #PWR5
U 1 1 5069D42A
P 7650 5600
F 0 "#PWR02" H 7650 5690 20 0001 C CNN
F 0 "#PWR5" H 7650 5690 20 0001 C CNN
F 1 "+5V" H 7650 5690 30 0000 C CNN
1 7650 5600
1 0 0 -1
$EndComp
$Comp
L GND #PWR03
L GND #PWR7
U 1 1 5069D427
P 8300 6000
F 0 "#PWR03" H 8300 6000 30 0001 C CNN
F 0 "#PWR7" H 8300 6000 30 0001 C CNN
F 1 "GND" H 8300 5930 30 0001 C CNN
1 8300 6000
1 0 0 -1
@ -249,19 +243,19 @@ F 1 "CONN_3" V 8000 5800 40 0000 C CNN
-1 0 0 1
$EndComp
$Comp
L GND #PWR04
L GND #PWR13
U 1 1 5069D3DB
P 9750 5550
F 0 "#PWR04" H 9750 5550 30 0001 C CNN
F 0 "#PWR13" H 9750 5550 30 0001 C CNN
F 1 "GND" H 9750 5480 30 0001 C CNN
1 9750 5550
1 0 0 -1
$EndComp
$Comp
L +5V #PWR05
L +5V #PWR11
U 1 1 5069D354
P 9150 4950
F 0 "#PWR05" H 9150 5040 20 0001 C CNN
F 0 "#PWR11" H 9150 5040 20 0001 C CNN
F 1 "+5V" H 9150 5040 30 0000 C CNN
1 9150 4950
1 0 0 -1
@ -303,37 +297,37 @@ F 1 "CONN_6" V 10000 4600 60 0000 C CNN
-1 0 0 1
$EndComp
$Comp
L GND #PWR06
L GND #PWR14
U 1 1 5069D2A2
P 10300 4950
F 0 "#PWR06" H 10300 4950 30 0001 C CNN
F 0 "#PWR14" H 10300 4950 30 0001 C CNN
F 1 "GND" H 10300 4880 30 0001 C CNN
1 10300 4950
1 0 0 -1
$EndComp
$Comp
L +5V #PWR07
L +5V #PWR12
U 1 1 5069D2A1
P 9700 4100
F 0 "#PWR07" H 9700 4190 20 0001 C CNN
F 0 "#PWR12" H 9700 4190 20 0001 C CNN
F 1 "+5V" H 9700 4190 30 0000 C CNN
1 9700 4100
1 0 0 -1
$EndComp
$Comp
L +5V #PWR08
L +5V #PWR6
U 1 1 5069D26F
P 8250 3400
F 0 "#PWR08" H 8250 3490 20 0001 C CNN
F 0 "#PWR6" H 8250 3490 20 0001 C CNN
F 1 "+5V" H 8250 3490 30 0000 C CNN
1 8250 3400
1 0 0 -1
$EndComp
$Comp
L GND #PWR09
L GND #PWR8
U 1 1 5069D267
P 8850 4250
F 0 "#PWR09" H 8850 4250 30 0001 C CNN
F 0 "#PWR8" H 8850 4250 30 0001 C CNN
F 1 "GND" H 8850 4180 30 0001 C CNN
1 8850 4250
1 0 0 -1
@ -356,7 +350,7 @@ F 1 "CONN_6" V 7950 3900 60 0000 C CNN
1 7900 3900
-1 0 0 1
$EndComp
Text GLabel 7850 4500 2 60 Input ~ 0
Text GLabel 7850 4500 2 60 Output ~ 0
RXD
Text GLabel 7850 4700 2 60 Input ~ 0
TXD
@ -397,19 +391,19 @@ F 1 "CONN_6" V 7650 3900 60 0000 C CNN
1 0 0 -1
$EndComp
$Comp
L GND #PWR010
L GND #PWR4
U 1 1 5069BC71
P 5550 6400
F 0 "#PWR010" H 5550 6400 30 0001 C CNN
F 0 "#PWR4" H 5550 6400 30 0001 C CNN
F 1 "GND" H 5550 6330 30 0001 C CNN
1 5550 6400
1 0 0 -1
$EndComp
$Comp
L +5V #PWR011
L +5V #PWR3
U 1 1 5069BBAF
P 5550 2750
F 0 "#PWR011" H 5550 2840 20 0001 C CNN
F 0 "#PWR3" H 5550 2840 20 0001 C CNN
F 1 "+5V" H 5550 2840 30 0000 C CNN
1 5550 2750
1 0 0 -1
@ -469,10 +463,10 @@ F 1 "100nF" H 3100 4750 50 0000 L CNN
1 0 0 -1
$EndComp
$Comp
L GND #PWR012
L GND #PWR2
U 1 1 5069B4FE
P 2700 5500
F 0 "#PWR012" H 2700 5500 30 0001 C CNN
F 0 "#PWR2" H 2700 5500 30 0001 C CNN
F 1 "GND" H 2700 5430 30 0001 C CNN
1 2700 5500
1 0 0 -1
@ -530,10 +524,10 @@ F 1 "CONN_3X2" V 8450 2850 40 0000 C CNN
1 0 0 -1
$EndComp
$Comp
L GND #PWR013
L GND #PWR10
U 1 1 50C6F9DA
P 8900 2950
F 0 "#PWR013" H 8900 2950 30 0001 C CNN
F 0 "#PWR10" H 8900 2950 30 0001 C CNN
F 1 "GND" H 8900 2880 30 0001 C CNN
1 8900 2950
1 0 0 -1
@ -543,10 +537,10 @@ Wire Wire Line
Wire Wire Line
8900 2850 8850 2850
$Comp
L +5V #PWR014
L +5V #PWR9
U 1 1 50C6FA7D
P 8900 2550
F 0 "#PWR014" H 8900 2640 20 0001 C CNN
F 0 "#PWR9" H 8900 2640 20 0001 C CNN
F 1 "+5V" H 8900 2640 30 0000 C CNN
1 8900 2550
1 0 0 -1
@ -586,4 +580,10 @@ MOSI
Wire Wire Line
7050 3950 7050 3450
Connection ~ 7050 3950
Wire Wire Line
7500 5150 7500 4500
Connection ~ 7500 5150
Wire Wire Line
7700 4700 7700 5050
Connection ~ 7700 5050
$EndSCHEMATC

17
kaboard_panelized.000
View File

@ -1,6 +1,6 @@
PCBNEW-BOARD Version 1 date Tue 18 Dec 2012 05:49:42 PM CET
PCBNEW-BOARD Version 1 date Tue 18 Dec 2012 09:42:44 AM CET
# Created by Pcbnew(2012-10-13 BZR 3765)-stable
# Created by Pcbnew(2012-12-10 BZR 3844)-stable
$GENERAL
encoding utf-8
@ -63,6 +63,7 @@ TextModWidth 120
PadSize 354 354
PadDrill 354
Pad2MaskClearance 100
SolderMaskMinWidth 0
AuxiliaryAxisOrg 36614 18898
VisibleElements 7FFFFBFF
PcbPlotParams (pcbplotparams (layerselection 15761409) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin true) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk true) (outputformat 1) (mirror false) (drillshape 0) (scaleselection 1) (outputdirectory plot/panelized/))
@ -10843,7 +10844,7 @@ Ro 0 0 0
$EndSHAPE3D
$EndMODULE sod123
$MODULE bornier2
Po 56107 56656 0 15 50D09EA0 50D03622 ~~
Po 56107 56656 0 15 50D02666 50D03622 ~~
Li bornier2
Cd Bornier d'alimentation 2 pins
Kw DEV
@ -10851,7 +10852,7 @@ Sc 50D03622
AR /5069AFCC/50C4B3A1
Op 0 0 0
T0 0 -1800 394 394 0 99 N V 21 N "P10"
T1 0 2000 600 600 0 120 N I 21 N "CONN_2"
T1 0 2000 600 600 0 120 N V 21 N "CONN_2"
DS 2000 1000 -2000 1000 120 21
DS 2000 1500 2000 -1500 120 21
DS 2000 -1500 -2000 -1500 120 21
@ -23463,7 +23464,7 @@ Ro 0 0 0
$EndSHAPE3D
$EndMODULE sod123
$MODULE bornier2
Po 43116 56657 0 15 50D09E9C 50D02F30 ~~
Po 43116 56657 0 15 50D02666 50D02F30 ~~
Li bornier2
Cd Bornier d'alimentation 2 pins
Kw DEV
@ -23471,7 +23472,7 @@ Sc 50D02F30
AR /5069AFCC/50C4B3A1
Op 0 0 0
T0 0 -1800 394 394 0 99 N V 21 N "P10"
T1 0 2000 600 600 0 120 N I 21 N "CONN_2"
T1 0 2000 600 600 0 120 N V 21 N "CONN_2"
DS 2000 1000 -2000 1000 120 21
DS 2000 1500 2000 -1500 120 21
DS 2000 -1500 -2000 -1500 120 21
@ -27549,7 +27550,7 @@ Ro 0 0 0
$EndSHAPE3D
$EndMODULE SM0603
$MODULE bornier2
Po 69493 56657 0 15 50D09EA4 50C4B70F ~~
Po 69493 56657 0 15 50D02666 50C4B70F ~~
Li bornier2
Cd Bornier d'alimentation 2 pins
Kw DEV
@ -27557,7 +27558,7 @@ Sc 50C4B70F
AR /5069AFCC/50C4B3A1
Op 0 0 0
T0 0 -1800 394 394 0 99 N V 21 N "P10"
T1 0 2000 600 600 0 120 N I 21 N "CONN_2"
T1 0 2000 600 600 0 120 N V 21 N "CONN_2"
DS 2000 1000 -2000 1000 120 21
DS 2000 1500 2000 -1500 120 21
DS 2000 -1500 -2000 -1500 120 21

28
kaboard_panelized.brd
View File

@ -1,6 +1,6 @@
PCBNEW-BOARD Version 1 date Tue 18 Dec 2012 05:54:52 PM CET
PCBNEW-BOARD Version 1 date Thu 10 Jan 2013 10:24:07 AM CET
# Created by Pcbnew(2012-10-13 BZR 3765)-stable
# Created by Pcbnew(2012-12-10 BZR 3844)-stable
$GENERAL
encoding utf-8
@ -9,8 +9,8 @@ LayerCount 2
EnabledLayers 1FFF8001
Links 503
NoConn 80
Di 27913 14763 76060 59117
Ndraw 98
Di 27913 7174 82727 59117
Ndraw 99
Ntrack 606
Nzone 0
BoardThickness 630
@ -21,7 +21,7 @@ $EndGENERAL
$SHEETDESCR
Sheet A4 11693 8268
Title ""
Date "18 dec 2012"
Date "10 jan 2013"
Rev ""
Comp ""
Comment1 ""
@ -63,6 +63,7 @@ TextModWidth 120
PadSize 354 354
PadDrill 354
Pad2MaskClearance 100
SolderMaskMinWidth 0
AuxiliaryAxisOrg 36614 18898
VisibleElements 7FFFFBFF
PcbPlotParams (pcbplotparams (layerselection 15761409) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin true) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk true) (outputformat 1) (mirror false) (drillshape 0) (scaleselection 1) (outputdirectory plot/panelized/))
@ -10843,7 +10844,7 @@ Ro 0 0 0
$EndSHAPE3D
$EndMODULE sod123
$MODULE bornier2
Po 56107 56656 0 15 50D09FDB 50D03622 ~~
Po 56107 56656 0 15 50D02666 50D03622 ~~
Li bornier2
Cd Bornier d'alimentation 2 pins
Kw DEV
@ -10851,7 +10852,7 @@ Sc 50D03622
AR /5069AFCC/50C4B3A1
Op 0 0 0
T0 0 -1800 394 394 0 99 N V 21 N "P10"
T1 0 2000 600 600 0 120 N I 21 N "CONN_2"
T1 0 2000 600 600 0 120 N V 21 N "CONN_2"
DS 2000 1000 -2000 1000 120 21
DS 2000 1500 2000 -1500 120 21
DS 2000 -1500 -2000 -1500 120 21
@ -23463,7 +23464,7 @@ Ro 0 0 0
$EndSHAPE3D
$EndMODULE sod123
$MODULE bornier2
Po 43116 56657 0 15 50D09FD1 50D02F30 ~~
Po 43116 56657 0 15 50D02666 50D02F30 ~~
Li bornier2
Cd Bornier d'alimentation 2 pins
Kw DEV
@ -23471,7 +23472,7 @@ Sc 50D02F30
AR /5069AFCC/50C4B3A1
Op 0 0 0
T0 0 -1800 394 394 0 99 N V 21 N "P10"
T1 0 2000 600 600 0 120 N I 21 N "CONN_2"
T1 0 2000 600 600 0 120 N V 21 N "CONN_2"
DS 2000 1000 -2000 1000 120 21
DS 2000 1500 2000 -1500 120 21
DS 2000 -1500 -2000 -1500 120 21
@ -27549,7 +27550,7 @@ Ro 0 0 0
$EndSHAPE3D
$EndMODULE SM0603
$MODULE bornier2
Po 69493 56657 0 15 50D09EA4 50C4B70F ~~
Po 69493 56657 0 15 50D02666 50C4B70F ~~
Li bornier2
Cd Bornier d'alimentation 2 pins
Kw DEV
@ -27557,7 +27558,7 @@ Sc 50C4B70F
AR /5069AFCC/50C4B3A1
Op 0 0 0
T0 0 -1800 394 394 0 99 N V 21 N "P10"
T1 0 2000 600 600 0 120 N I 21 N "CONN_2"
T1 0 2000 600 600 0 120 N V 21 N "CONN_2"
DS 2000 1000 -2000 1000 120 21
DS 2000 1500 2000 -1500 120 21
DS 2000 -1500 -2000 -1500 120 21
@ -38143,6 +38144,11 @@ Dl -1843 -310
Dl -1845 -292
Dl -1845 -292
$EndMODULE ccbysa_silkbot_15_00mm
$TEXTPCB
Te "OLD 1.0 VERSION"
Po 56550 12150 3937 5000 984 0
De 25 1 0 Normal
$EndTEXTPCB
$DRAWSEGMENT
Po 0 36614 58268 36614 18898 150
De 20 0 900 0 0

26
known_issues.md Normal file
View File

@ -0,0 +1,26 @@
Known issues on the Kaboard
===========================
Version 1.0
-----------
* TXD and RXD lines from ft232r to AVR are not crosslinked.
Correct is : ft232r TXD -> AVR RXD, ft232r RXD -> AVR TXD
Solution : Cut the tracks and use some wire or 0 Ohm resistors to fix it
Fixed in 1.1
* Reset is directly connected to the dtr pin on the ft232.
When programming the AVR via the isp header,
the porgrammer is unable to pull reset low for this reason.
Also when progamming via usb with avrdude dtr will stay low
to long time the bootloader won't start in time.
Solution : Cut the track on the backside of the board
and insert a 100nf capacitor.
Fixed in 1.1
Version 1.1
-----------
* None found yet

475
optiboot/Makefile Normal file
View File

@ -0,0 +1,475 @@
# Makefile for ATmegaBOOT
# E.Lins, 18.7.2005
# $Id$
#
# Instructions
#
# To make bootloader .hex file:
# make diecimila
# make lilypad
# make ng
# etc...
#
# To burn bootloader .hex file:
# make diecimila_isp
# make lilypad_isp
# make ng_isp
# etc...
# program name should not be changed...
PROGRAM = optiboot
# The default behavior is to build using tools that are in the users
# current path variables, but we can also build using an installed
# Arduino user IDE setup, or the Arduino source tree.
# Uncomment this next lines to build within the arduino environment,
# using the arduino-included avrgcc toolset (mac and pc)
# ENV ?= arduino
# ENV ?= arduinodev
# OS ?= macosx
# OS ?= windows
# enter the parameters for the avrdude isp tool
ISPTOOL = stk500
ISPPORT = /dev/ttyS0
ISPSPEED = -b 115200
MCU_TARGET = atmega168
LDSECTIONS = -Wl,--section-start=.text=0x3e00 -Wl,--section-start=.version=0x3ffe
# Build environments
# Start of some ugly makefile-isms to allow optiboot to be built
# in several different environments. See the README.TXT file for
# details.
# default
fixpath = $(1)
ifeq ($(ENV), arduino)
# For Arduino, we assume that we're connected to the optiboot directory
# included with the arduino distribution, which means that the full set
# of avr-tools are "right up there" in standard places.
TOOLROOT = ../../../tools
GCCROOT = $(TOOLROOT)/avr/bin/
AVRDUDE_CONF = -C$(TOOLROOT)/avr/etc/avrdude.conf
ifeq ($(OS), windows)
# On windows, SOME of the tool paths will need to have backslashes instead
# of forward slashes (because they use windows cmd.exe for execution instead
# of a unix/mingw shell?) We also have to ensure that a consistent shell
# is used even if a unix shell is installed (ie as part of WINAVR)
fixpath = $(subst /,\,$1)
SHELL = cmd.exe
endif
else ifeq ($(ENV), arduinodev)
# Arduino IDE source code environment. Use the unpacked compilers created
# by the build (you'll need to do "ant build" first.)
ifeq ($(OS), macosx)
TOOLROOT = ../../../../build/macosx/work/Arduino.app/Contents/Resources/Java/hardware/tools
endif
ifeq ($(OS), windows)
TOOLROOT = ../../../../build/windows/work/hardware/tools
endif
GCCROOT = $(TOOLROOT)/avr/bin/
AVRDUDE_CONF = -C$(TOOLROOT)/avr/etc/avrdude.conf
else
GCCROOT =
AVRDUDE_CONF =
endif
#
# End of build environment code.
# the efuse should really be 0xf8; since, however, only the lower
# three bits of that byte are used on the atmega168, avrdude gets
# confused if you specify 1's for the higher bits, see:
# http://tinker.it/now/2007/02/24/the-tale-of-avrdude-atmega168-and-extended-bits-fuses/
#
# similarly, the lock bits should be 0xff instead of 0x3f (to
# unlock the bootloader section) and 0xcf instead of 0x2f (to
# lock it), but since the high two bits of the lock byte are
# unused, avrdude would get confused.
# -U efuse:w:0x$(EFUSE):m
ISPFUSES = $(GCCROOT)avrdude $(AVRDUDE_CONF) -c $(ISPTOOL) \
-p $(MCU_TARGET) -P $(ISPPORT) $(ISPSPEED) \
-e -u -U lock:w:0x3f:m \
-U hfuse:w:0x$(HFUSE):m -U lfuse:w:0x$(LFUSE):m
ISPFLASH = $(GCCROOT)avrdude $(AVRDUDE_CONF) -c $(ISPTOOL) \
-p $(MCU_TARGET) -P $(ISPPORT) $(ISPSPEED) \
-U flash:w:$(PROGRAM)_$(TARGET).hex -U lock:w:0x2f:m
STK500 = "C:\Program Files\Atmel\AVR Tools\STK500\Stk500.exe"
STK500-1 = $(STK500) -e -d$(MCU_TARGET) -pf -vf -if$(PROGRAM)_$(TARGET).hex \
-lFF -LFF -f$(HFUSE)$(LFUSE) -EF8 -ms -q -cUSB -I200kHz -s -wt
STK500-2 = $(STK500) -d$(MCU_TARGET) -ms -q -lCF -LCF -cUSB -I200kHz -s -wt
OBJ = $(PROGRAM).o
OPTIMIZE = -Os -fno-inline-small-functions -fno-split-wide-types -mshort-calls
DEFS =
LIBS =
CC = $(GCCROOT)avr-gcc
# Override is only needed by avr-lib build system.
override CFLAGS = -g -Wall $(OPTIMIZE) -mmcu=$(MCU_TARGET) -DF_CPU=$(AVR_FREQ) $(DEFS)
override LDFLAGS = $(LDSECTIONS) -Wl,--relax -Wl,--gc-sections -nostartfiles -nostdlib
OBJCOPY = $(GCCROOT)avr-objcopy
OBJDUMP = $(call fixpath,$(GCCROOT)avr-objdump)
SIZE = $(GCCROOT)avr-size
# Test platforms
# Virtual boot block test
virboot328: TARGET = atmega328
virboot328: MCU_TARGET = atmega328p
virboot328: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' '-DVIRTUAL_BOOT'
virboot328: AVR_FREQ = 16000000L
virboot328: LDSECTIONS = -Wl,--section-start=.text=0x7e00 -Wl,--section-start=.version=0x7ffe
virboot328: $(PROGRAM)_atmega328.hex
virboot328: $(PROGRAM)_atmega328.lst
# 20MHz clocked platforms
#
# These are capable of 230400 baud, or 115200 baud on PC (Arduino Avrdude issue)
#
pro20: TARGET = pro_20mhz
pro20: MCU_TARGET = atmega168
pro20: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
pro20: AVR_FREQ = 20000000L
pro20: $(PROGRAM)_pro_20mhz.hex
pro20: $(PROGRAM)_pro_20mhz.lst
pro20_isp: pro20
pro20_isp: TARGET = pro_20mhz
# 2.7V brownout
pro20_isp: HFUSE = DD
# Full swing xtal (20MHz) 258CK/14CK+4.1ms
pro20_isp: LFUSE = C6
# 512 byte boot
pro20_isp: EFUSE = 04
pro20_isp: isp
# 16MHz clocked platforms
#
# These are capable of 230400 baud, or 115200 baud on PC (Arduino Avrdude issue)
#
pro16: TARGET = pro_16MHz
pro16: MCU_TARGET = atmega168
pro16: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
pro16: AVR_FREQ = 16000000L
pro16: $(PROGRAM)_pro_16MHz.hex
pro16: $(PROGRAM)_pro_16MHz.lst
pro16_isp: pro16
pro16_isp: TARGET = pro_16MHz
# 2.7V brownout
pro16_isp: HFUSE = DD
# Full swing xtal (20MHz) 258CK/14CK+4.1ms
pro16_isp: LFUSE = C6
# 512 byte boot
pro16_isp: EFUSE = 04
pro16_isp: isp
# Diecimila, Duemilanove with m168, and NG use identical bootloaders
# Call it "atmega168" for generality and clarity, keep "diecimila" for
# backward compatibility of makefile
#
atmega168: TARGET = atmega168
atmega168: MCU_TARGET = atmega168
atmega168: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
atmega168: AVR_FREQ = 16000000L
atmega168: $(PROGRAM)_atmega168.hex
atmega168: $(PROGRAM)_atmega168.lst
atmega168_isp: atmega168
atmega168_isp: TARGET = atmega168
# 2.7V brownout
atmega168_isp: HFUSE = DD
# Low power xtal (16MHz) 16KCK/14CK+65ms
atmega168_isp: LFUSE = FF
# 512 byte boot
atmega168_isp: EFUSE = 04
atmega168_isp: isp
diecimila: TARGET = diecimila
diecimila: MCU_TARGET = atmega168
diecimila: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
diecimila: AVR_FREQ = 16000000L
diecimila: $(PROGRAM)_diecimila.hex
diecimila: $(PROGRAM)_diecimila.lst
diecimila_isp: diecimila
diecimila_isp: TARGET = diecimila
# 2.7V brownout
diecimila_isp: HFUSE = DD
# Low power xtal (16MHz) 16KCK/14CK+65ms
diecimila_isp: LFUSE = FF
# 512 byte boot
diecimila_isp: EFUSE = 04
diecimila_isp: isp
atmega328: TARGET = atmega328
atmega328: MCU_TARGET = atmega328p
atmega328: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
atmega328: AVR_FREQ = 16000000L
atmega328: LDSECTIONS = -Wl,--section-start=.text=0x7e00 -Wl,--section-start=.version=0x7ffe
atmega328: $(PROGRAM)_atmega328.hex
atmega328: $(PROGRAM)_atmega328.lst
atmega328_isp: atmega328
atmega328_isp: TARGET = atmega328
atmega328_isp: MCU_TARGET = atmega328p
# 512 byte boot, SPIEN
atmega328_isp: HFUSE = DE
# Low power xtal (16MHz) 16KCK/14CK+65ms
atmega328_isp: LFUSE = FF
# 2.7V brownout
atmega328_isp: EFUSE = 05
atmega328_isp: isp
# Sanguino has a minimum boot size of 1024 bytes, so enable extra functions
#
sanguino: TARGET = atmega644p
sanguino: MCU_TARGET = atmega644p
sanguino: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' '-DBIGBOOT'
sanguino: AVR_FREQ = 16000000L
sanguino: LDSECTIONS = -Wl,--section-start=.text=0xfc00
sanguino: $(PROGRAM)_atmega644p.hex
sanguino: $(PROGRAM)_atmega644p.lst
sanguino_isp: sanguino
sanguino_isp: TARGET = atmega644p
sanguino_isp: MCU_TARGET = atmega644p
# 1024 byte boot
sanguino_isp: HFUSE = DE
# Low power xtal (16MHz) 16KCK/14CK+65ms
sanguino_isp: LFUSE = FF
# 2.7V brownout
sanguino_isp: EFUSE = 05
sanguino_isp: isp
# Mega has a minimum boot size of 1024 bytes, so enable extra functions
#mega: TARGET = atmega1280
mega: MCU_TARGET = atmega1280
mega: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' '-DBIGBOOT'
mega: AVR_FREQ = 16000000L
mega: LDSECTIONS = -Wl,--section-start=.text=0x1fc00
mega: $(PROGRAM)_atmega1280.hex
mega: $(PROGRAM)_atmega1280.lst
mega_isp: mega
mega_isp: TARGET = atmega1280
mega_isp: MCU_TARGET = atmega1280
# 1024 byte boot
mega_isp: HFUSE = DE
# Low power xtal (16MHz) 16KCK/14CK+65ms
mega_isp: LFUSE = FF
# 2.7V brownout
mega_isp: EFUSE = 05
mega_isp: isp
# ATmega8
#
atmega8: TARGET = atmega8
atmega8: MCU_TARGET = atmega8
atmega8: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' '-DTIMEOUT_MS=10000'
#AVR_FREQ = 16000000L
atmega8: AVR_FREQ = 3686400L
atmega8: LDSECTIONS = -Wl,--section-start=.text=0x1e00 -Wl,--section-start=.version=0x1ffe
atmega8: $(PROGRAM)_atmega8.hex
atmega8: $(PROGRAM)_atmega8.lst
atmega8_isp: atmega8
atmega8_isp: TARGET = atmega8
atmega8_isp: MCU_TARGET = atmega8
# SPIEN, CKOPT, Bootsize=512B
atmega8_isp: HFUSE = CC
# 2.7V brownout, Low power xtal (16MHz) 16KCK/14CK+65ms
atmega8_isp: LFUSE = BF
atmega8_isp: isp
# ATmega88
#
atmega88: TARGET = atmega88
atmega88: MCU_TARGET = atmega88
atmega88: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
atmega88: AVR_FREQ = 16000000L
atmega88: LDSECTIONS = -Wl,--section-start=.text=0x1e00 -Wl,--section-start=.version=0x1ffe
atmega88: $(PROGRAM)_atmega88.hex
atmega88: $(PROGRAM)_atmega88.lst
atmega88_isp: atmega88
atmega88_isp: TARGET = atmega88
atmega88_isp: MCU_TARGET = atmega88
# 2.7V brownout
atmega88_isp: HFUSE = DD
# Low power xtal (16MHz) 16KCK/14CK+65ms
atemga88_isp: LFUSE = FF
# 512 byte boot
atmega88_isp: EFUSE = 04
atmega88_isp: isp
# 8MHz clocked platforms
#
# These are capable of 115200 baud
#
lilypad: TARGET = lilypad
lilypad: MCU_TARGET = atmega168
lilypad: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
lilypad: AVR_FREQ = 8000000L
lilypad: $(PROGRAM)_lilypad.hex
lilypad: $(PROGRAM)_lilypad.lst
lilypad_isp: lilypad
lilypad_isp: TARGET = lilypad
# 2.7V brownout
lilypad_isp: HFUSE = DD
# Internal 8MHz osc (8MHz) Slow rising power
lilypad_isp: LFUSE = E2
# 512 byte boot
lilypad_isp: EFUSE = 04
lilypad_isp: isp
lilypad_resonator: TARGET = lilypad_resonator
lilypad_resonator: MCU_TARGET = atmega168
lilypad_resonator: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
lilypad_resonator: AVR_FREQ = 8000000L
lilypad_resonator: $(PROGRAM)_lilypad_resonator.hex
lilypad_resonator: $(PROGRAM)_lilypad_resonator.lst
lilypad_resonator_isp: lilypad_resonator
lilypad_resonator_isp: TARGET = lilypad_resonator
# 2.7V brownout
lilypad_resonator_isp: HFUSE = DD
# Full swing xtal (20MHz) 258CK/14CK+4.1ms
lilypad_resonator_isp: LFUSE = C6
# 512 byte boot
lilypad_resonator_isp: EFUSE = 04
lilypad_resonator_isp: isp
pro8: TARGET = pro_8MHz
pro8: MCU_TARGET = atmega168
pro8: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
pro8: AVR_FREQ = 8000000L
pro8: $(PROGRAM)_pro_8MHz.hex
pro8: $(PROGRAM)_pro_8MHz.lst
pro8_isp: pro8
pro8_isp: TARGET = pro_8MHz
# 2.7V brownout
pro8_isp: HFUSE = DD
# Full swing xtal (20MHz) 258CK/14CK+4.1ms
pro8_isp: LFUSE = C6
# 512 byte boot
pro8_isp: EFUSE = 04
pro8_isp: isp
atmega328_pro8: TARGET = atmega328_pro_8MHz
atmega328_pro8: MCU_TARGET = atmega328p
atmega328_pro8: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
atmega328_pro8: AVR_FREQ = 8000000L
atmega328_pro8: LDSECTIONS = -Wl,--section-start=.text=0x7e00 -Wl,--section-start=.version=0x7ffe
atmega328_pro8: $(PROGRAM)_atmega328_pro_8MHz.hex
atmega328_pro8: $(PROGRAM)_atmega328_pro_8MHz.lst
atmega328_pro8_isp: atmega328_pro8
atmega328_pro8_isp: TARGET = atmega328_pro_8MHz
atmega328_pro8_isp: MCU_TARGET = atmega328p
# 512 byte boot, SPIEN
atmega328_pro8_isp: HFUSE = DE
# Low power xtal (16MHz) 16KCK/14CK+65ms
atmega328_pro8_isp: LFUSE = FF
# 2.7V brownout
atmega328_pro8_isp: EFUSE = 05
atmega328_pro8_isp: isp
# 1MHz clocked platforms
#
# These are capable of 9600 baud
#
luminet: TARGET = luminet
luminet: MCU_TARGET = attiny84
luminet: CFLAGS += '-DLED_START_FLASHES=3' '-DSOFT_UART' '-DBAUD_RATE=9600'
luminet: CFLAGS += '-DVIRTUAL_BOOT_PARTITION'
luminet: AVR_FREQ = 1000000L
luminet: LDSECTIONS = -Wl,--section-start=.text=0x1d00 -Wl,--section-start=.version=0x1efe
luminet: $(PROGRAM)_luminet.hex
luminet: $(PROGRAM)_luminet.lst
luminet_isp: luminet
luminet_isp: TARGET = luminet
luminet_isp: MCU_TARGET = attiny84
# Brownout disabled
luminet_isp: HFUSE = DF
# 1MHz internal oscillator, slowly rising power
luminet_isp: LFUSE = 62
# Self-programming enable
luminet_isp: EFUSE = FE
luminet_isp: isp
#
# Kabord
#
kaboard: TARGET = kaboard
kaboard: MCU_TARGET = atmega8
kaboard: CFLAGS += '-DLED_START_FLASHES=0' '-DBAUD_RATE=115200' '-DTIMEOUT_MS=1000'
kaboard: AVR_FREQ = 16000000L
kaboard: LDSECTIONS = -Wl,--section-start=.text=0x1e00 -Wl,--section-start=.version=0x1ffe
kaboard: $(PROGRAM)_kaboard.hex
kaboard: $(PROGRAM)_kaboard.lst
kaboard_isp: kaboard
kaboard_isp: TARGET = kaboard
kaboard_isp: MCU_TARGET = atmega8
# EESAVE = 0, RSTDISBL = 0, SUT_CKSEL = Ext. Crystal hig Freq 1K CK + 64ms, WTDON = 0
kaboard_isp: HFUSE = DA
# BODEN = 0, BOOTRST = 1, BOOTSZ = 512 CKOPT = 0
kaboard_isp: LFUSE = CF
kaboard_isp: isp
#
# Generic build instructions
#
#
isp: $(TARGET)
$(ISPFUSES)
$(ISPFLASH)
isp-stk500: $(PROGRAM)_$(TARGET).hex
$(STK500-1)
$(STK500-2)
%.elf: $(OBJ)
$(CC) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(LIBS)
$(SIZE) $@
clean:
rm -rf *.o *.elf *.lst *.map *.sym *.lss *.eep *.srec *.bin *.hex
%.lst: %.elf
$(OBJDUMP) -h -S $< > $@
%.hex: %.elf
$(OBJCOPY) -j .text -j .data -j .version --set-section-flags .version=alloc,load -O ihex $< $@
%.srec: %.elf
$(OBJCOPY) -j .text -j .data -j .version --set-section-flags .version=alloc,load -O srec $< $@
%.bin: %.elf
$(OBJCOPY) -j .text -j .data -j .version --set-section-flags .version=alloc,load -O binary $< $@

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This directory contains the Optiboot small bootloader for AVR
microcontrollers, somewhat modified specifically for the Arduino
environment.
Optiboot is more fully described here: http://code.google.com/p/optiboot/
and is the work of Peter Knight (aka Cathedrow), building on work of Jason P
Kyle, Spiff, and Ladyada. Arduino-specific modification are by Bill
Westfield (aka WestfW)
Arduino-specific issues are tracked as part of the Arduino project
at http://code.google.com/p/arduino
------------------------------------------------------------
Building optiboot for Arduino.
Production builds of optiboot for Arduino are done on a Mac in "unix mode"
using CrossPack-AVR-20100115. CrossPack tracks WINAVR (for windows), which
is just a package of avr-gcc and related utilities, so similar builds should
work on Windows or Linux systems.
One of the Arduino-specific changes is modifications to the makefile to
allow building optiboot using only the tools installed as part of the
Arduino environment, or the Arduino source development tree. All three
build procedures should yield identical binaries (.hex files) (although
this may change if compiler versions drift apart between CrossPack and
the Arduino IDE.)
Building Optiboot in the Arduino IDE Install.
Work in the .../hardware/arduino/bootloaders/optiboot/ and use the
"omake <targets>" command, which just generates a command that uses
the arduino-included "make" utility with a command like:
make OS=windows ENV=arduino <targets>
or make OS=macosx ENV=arduino <targets>
On windows, this assumes you're using the windows command shell. If
you're using a cygwin or mingw shell, or have one of those in your
path, the build will probably break due to slash vs backslash issues.
On a Mac, if you have the developer tools installed, you can use the
Apple-supplied version of make.
The makefile uses relative paths ("../../../tools/" and such) to find
the programs it needs, so you need to work in the existing optiboot
directory (or something created at the same "level") for it to work.
Building Optiboot in the Arduino Source Development Install.
In this case, there is no special shell script, and you're assumed to
have "make" installed somewhere in your path.
Build the Arduino source ("ant build") to unpack the tools into the
expected directory.
Work in Arduino/hardware/arduino/bootloaders/optiboot and use
make OS=windows ENV=arduinodev <targets>
or make OS=macosx ENV=arduinodev <targets>
Programming Chips Using the _isp Targets
The CPU targets have corresponding ISP targets that will actuall
program the bootloader into a chip. "atmega328_isp" for the atmega328,
for example. These will set the fuses and lock bits as appropriate as
well as uploading the bootloader code.
The makefiles default to using a USB programmer, but you can use
a serial programmer like ArduinoISP by changing the appropriate
variables when you invoke make:
make ISPTOOL=stk500v1 ISPPORT=/dev/tty.usbserial-A20e1eAN \
ISPSPEED=-b19200 atmega328_isp
The "atmega8_isp" target does not currently work, because the mega8
doesn't have the "extended" fuse that the generic ISP target wants to
pass on to avrdude. You'll need to run avrdude manually.
Standard Targets
I've reduced the pre-built and source-version-controlled targets
(.hex and .lst files included in the git repository) to just the
three basic 16MHz targets: atmega8, atmega16, atmega328.

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/* Modified to use out for SPM access
** Peter Knight, Optiboot project http://optiboot.googlecode.com
**
** Todo: Tidy up
**
** "_short" routines execute 1 cycle faster and use 1 less word of flash
** by using "out" instruction instead of "sts".
**
** Additional elpm variants that trust the value of RAMPZ
*/
/* Copyright (c) 2002, 2003, 2004, 2005, 2006, 2007 Eric B. Weddington
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of the copyright holders nor the names of
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
/* $Id: boot.h,v 1.27.2.3 2008/09/30 13:58:48 arcanum Exp $ */
#ifndef _AVR_BOOT_H_
#define _AVR_BOOT_H_ 1
/** \file */
/** \defgroup avr_boot <avr/boot.h>: Bootloader Support Utilities
\code
#include <avr/io.h>
#include <avr/boot.h>
\endcode
The macros in this module provide a C language interface to the
bootloader support functionality of certain AVR processors. These
macros are designed to work with all sizes of flash memory.
Global interrupts are not automatically disabled for these macros. It
is left up to the programmer to do this. See the code example below.
Also see the processor datasheet for caveats on having global interrupts
enabled during writing of the Flash.
\note Not all AVR processors provide bootloader support. See your
processor datasheet to see if it provides bootloader support.
\todo From email with Marek: On smaller devices (all except ATmega64/128),
__SPM_REG is in the I/O space, accessible with the shorter "in" and "out"
instructions - since the boot loader has a limited size, this could be an
important optimization.
\par API Usage Example
The following code shows typical usage of the boot API.
\code
#include <inttypes.h>
#include <avr/interrupt.h>
#include <avr/pgmspace.h>
void boot_program_page (uint32_t page, uint8_t *buf)
{
uint16_t i;
uint8_t sreg;
// Disable interrupts.
sreg = SREG;
cli();
eeprom_busy_wait ();
boot_page_erase (page);
boot_spm_busy_wait (); // Wait until the memory is erased.
for (i=0; i<SPM_PAGESIZE; i+=2)
{
// Set up little-endian word.
uint16_t w = *buf++;
w += (*buf++) << 8;
boot_page_fill (page + i, w);
}
boot_page_write (page); // Store buffer in flash page.
boot_spm_busy_wait(); // Wait until the memory is written.
// Reenable RWW-section again. We need this if we want to jump back
// to the application after bootloading.
boot_rww_enable ();
// Re-enable interrupts (if they were ever enabled).
SREG = sreg;
}\endcode */
#include <avr/eeprom.h>
#include <avr/io.h>
#include <inttypes.h>
#include <limits.h>
/* Check for SPM Control Register in processor. */
#if defined (SPMCSR)
# define __SPM_REG SPMCSR
#elif defined (SPMCR)
# define __SPM_REG SPMCR
#else
# error AVR processor does not provide bootloader support!
#endif
/* Check for SPM Enable bit. */
#if defined(SPMEN)
# define __SPM_ENABLE SPMEN
#elif defined(SELFPRGEN)
# define __SPM_ENABLE SELFPRGEN
#else
# error Cannot find SPM Enable bit definition!
#endif
/** \ingroup avr_boot
\def BOOTLOADER_SECTION
Used to declare a function or variable to be placed into a
new section called .bootloader. This section and its contents
can then be relocated to any address (such as the bootloader
NRWW area) at link-time. */
#define BOOTLOADER_SECTION __attribute__ ((section (".bootloader")))
/* Create common bit definitions. */
#ifdef ASB
#define __COMMON_ASB ASB
#else
#define __COMMON_ASB RWWSB
#endif
#ifdef ASRE
#define __COMMON_ASRE ASRE
#else
#define __COMMON_ASRE RWWSRE
#endif
/* Define the bit positions of the Boot Lock Bits. */
#define BLB12 5
#define BLB11 4
#define BLB02 3
#define BLB01 2
/** \ingroup avr_boot
\def boot_spm_interrupt_enable()
Enable the SPM interrupt. */
#define boot_spm_interrupt_enable() (__SPM_REG |= (uint8_t)_BV(SPMIE))
/** \ingroup avr_boot
\def boot_spm_interrupt_disable()
Disable the SPM interrupt. */
#define boot_spm_interrupt_disable() (__SPM_REG &= (uint8_t)~_BV(SPMIE))
/** \ingroup avr_boot
\def boot_is_spm_interrupt()
Check if the SPM interrupt is enabled. */
#define boot_is_spm_interrupt() (__SPM_REG & (uint8_t)_BV(SPMIE))
/** \ingroup avr_boot
\def boot_rww_busy()
Check if the RWW section is busy. */
#define boot_rww_busy() (__SPM_REG & (uint8_t)_BV(__COMMON_ASB))
/** \ingroup avr_boot
\def boot_spm_busy()
Check if the SPM instruction is busy. */
#define boot_spm_busy() (__SPM_REG & (uint8_t)_BV(__SPM_ENABLE))
/** \ingroup avr_boot
\def boot_spm_busy_wait()
Wait while the SPM instruction is busy. */
#define boot_spm_busy_wait() do{}while(boot_spm_busy())
#define __BOOT_PAGE_ERASE (_BV(__SPM_ENABLE) | _BV(PGERS))
#define __BOOT_PAGE_WRITE (_BV(__SPM_ENABLE) | _BV(PGWRT))
#define __BOOT_PAGE_FILL _BV(__SPM_ENABLE)
#define __BOOT_RWW_ENABLE (_BV(__SPM_ENABLE) | _BV(__COMMON_ASRE))
#define __BOOT_LOCK_BITS_SET (_BV(__SPM_ENABLE) | _BV(BLBSET))
#define __boot_page_fill_short(address, data) \
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r0, %3\n\t" \
"out %0, %1\n\t" \
"spm\n\t" \
"clr r1\n\t" \
: \
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_PAGE_FILL), \
"z" ((uint16_t)address), \
"r" ((uint16_t)data) \
: "r0" \
); \
}))
#define __boot_page_fill_normal(address, data) \
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r0, %3\n\t" \
"sts %0, %1\n\t" \
"spm\n\t" \
"clr r1\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_PAGE_FILL), \
"z" ((uint16_t)address), \
"r" ((uint16_t)data) \
: "r0" \
); \
}))
#define __boot_page_fill_alternate(address, data)\
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r0, %3\n\t" \
"sts %0, %1\n\t" \
"spm\n\t" \
".word 0xffff\n\t" \
"nop\n\t" \
"clr r1\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_PAGE_FILL), \
"z" ((uint16_t)address), \
"r" ((uint16_t)data) \
: "r0" \
); \
}))
#define __boot_page_fill_extended(address, data) \
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r0, %4\n\t" \
"movw r30, %A3\n\t" \
"sts %1, %C3\n\t" \
"sts %0, %2\n\t" \
"spm\n\t" \
"clr r1\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"i" (_SFR_MEM_ADDR(RAMPZ)), \
"r" ((uint8_t)__BOOT_PAGE_FILL), \
"r" ((uint32_t)address), \
"r" ((uint16_t)data) \
: "r0", "r30", "r31" \
); \
}))
#define __boot_page_fill_extended_short(address, data) \
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r0, %4\n\t" \
"movw r30, %A3\n\t" \
"out %1, %C3\n\t" \
"out %0, %2\n\t" \
"spm\n\t" \
"clr r1\n\t" \
: \
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
"i" (_SFR_IO_ADDR(RAMPZ)), \
"r" ((uint8_t)__BOOT_PAGE_FILL), \
"r" ((uint32_t)address), \
"r" ((uint16_t)data) \
: "r0", "r30", "r31" \
); \
}))
#define __boot_page_erase_short(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"out %0, %1\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_PAGE_ERASE), \
"z" ((uint16_t)address) \
); \
}))
#define __boot_page_erase_normal(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"sts %0, %1\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_PAGE_ERASE), \
"z" ((uint16_t)address) \
); \
}))
#define __boot_page_erase_alternate(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"sts %0, %1\n\t" \
"spm\n\t" \
".word 0xffff\n\t" \
"nop\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_PAGE_ERASE), \
"z" ((uint16_t)address) \
); \
}))
#define __boot_page_erase_extended(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r30, %A3\n\t" \
"sts %1, %C3\n\t" \
"sts %0, %2\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"i" (_SFR_MEM_ADDR(RAMPZ)), \
"r" ((uint8_t)__BOOT_PAGE_ERASE), \
"r" ((uint32_t)address) \
: "r30", "r31" \
); \
}))
#define __boot_page_erase_extended_short(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r30, %A3\n\t" \
"out %1, %C3\n\t" \
"out %0, %2\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
"i" (_SFR_IO_ADDR(RAMPZ)), \
"r" ((uint8_t)__BOOT_PAGE_ERASE), \
"r" ((uint32_t)address) \
: "r30", "r31" \
); \
}))
#define __boot_page_write_short(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"out %0, %1\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_PAGE_WRITE), \
"z" ((uint16_t)address) \
); \
}))
#define __boot_page_write_normal(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"sts %0, %1\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_PAGE_WRITE), \
"z" ((uint16_t)address) \
); \
}))
#define __boot_page_write_alternate(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"sts %0, %1\n\t" \
"spm\n\t" \
".word 0xffff\n\t" \
"nop\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_PAGE_WRITE), \
"z" ((uint16_t)address) \
); \
}))
#define __boot_page_write_extended(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r30, %A3\n\t" \
"sts %1, %C3\n\t" \
"sts %0, %2\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"i" (_SFR_MEM_ADDR(RAMPZ)), \
"r" ((uint8_t)__BOOT_PAGE_WRITE), \
"r" ((uint32_t)address) \
: "r30", "r31" \
); \
}))
#define __boot_page_write_extended_short(address) \
(__extension__({ \
__asm__ __volatile__ \
( \
"movw r30, %A3\n\t" \
"out %1, %C3\n\t" \
"out %0, %2\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
"i" (_SFR_IO_ADDR(RAMPZ)), \
"r" ((uint8_t)__BOOT_PAGE_WRITE), \
"r" ((uint32_t)address) \
: "r30", "r31" \
); \
}))
#define __boot_rww_enable_short() \
(__extension__({ \
__asm__ __volatile__ \
( \
"out %0, %1\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_RWW_ENABLE) \
); \
}))
#define __boot_rww_enable() \
(__extension__({ \
__asm__ __volatile__ \
( \
"sts %0, %1\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_RWW_ENABLE) \
); \
}))
#define __boot_rww_enable_alternate() \
(__extension__({ \
__asm__ __volatile__ \
( \
"sts %0, %1\n\t" \
"spm\n\t" \
".word 0xffff\n\t" \
"nop\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_RWW_ENABLE) \
); \
}))
/* From the mega16/mega128 data sheets (maybe others):
Bits by SPM To set the Boot Loader Lock bits, write the desired data to
R0, write "X0001001" to SPMCR and execute SPM within four clock cycles
after writing SPMCR. The only accessible Lock bits are the Boot Lock bits
that may prevent the Application and Boot Loader section from any
software update by the MCU.
If bits 5..2 in R0 are cleared (zero), the corresponding Boot Lock bit
will be programmed if an SPM instruction is executed within four cycles
after BLBSET and SPMEN (or SELFPRGEN) are set in SPMCR. The Z-pointer is
don't care during this operation, but for future compatibility it is
recommended to load the Z-pointer with $0001 (same as used for reading the
Lock bits). For future compatibility It is also recommended to set bits 7,
6, 1, and 0 in R0 to 1 when writing the Lock bits. When programming the
Lock bits the entire Flash can be read during the operation. */
#define __boot_lock_bits_set_short(lock_bits) \
(__extension__({ \
uint8_t value = (uint8_t)(~(lock_bits)); \
__asm__ __volatile__ \
( \
"ldi r30, 1\n\t" \
"ldi r31, 0\n\t" \
"mov r0, %2\n\t" \
"out %0, %1\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_LOCK_BITS_SET), \
"r" (value) \
: "r0", "r30", "r31" \
); \
}))
#define __boot_lock_bits_set(lock_bits) \
(__extension__({ \
uint8_t value = (uint8_t)(~(lock_bits)); \
__asm__ __volatile__ \
( \
"ldi r30, 1\n\t" \
"ldi r31, 0\n\t" \
"mov r0, %2\n\t" \
"sts %0, %1\n\t" \
"spm\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_LOCK_BITS_SET), \
"r" (value) \
: "r0", "r30", "r31" \
); \
}))
#define __boot_lock_bits_set_alternate(lock_bits) \
(__extension__({ \
uint8_t value = (uint8_t)(~(lock_bits)); \
__asm__ __volatile__ \
( \
"ldi r30, 1\n\t" \
"ldi r31, 0\n\t" \
"mov r0, %2\n\t" \
"sts %0, %1\n\t" \
"spm\n\t" \
".word 0xffff\n\t" \
"nop\n\t" \
: \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_LOCK_BITS_SET), \
"r" (value) \
: "r0", "r30", "r31" \
); \
}))
/*
Reading lock and fuse bits:
Similarly to writing the lock bits above, set BLBSET and SPMEN (or
SELFPRGEN) bits in __SPMREG, and then (within four clock cycles) issue an
LPM instruction.
Z address: contents:
0x0000 low fuse bits
0x0001 lock bits
0x0002 extended fuse bits
0x0003 high fuse bits
Sounds confusing, doesn't it?
Unlike the macros in pgmspace.h, no need to care for non-enhanced
cores here as these old cores do not provide SPM support anyway.
*/
/** \ingroup avr_boot
\def GET_LOW_FUSE_BITS
address to read the low fuse bits, using boot_lock_fuse_bits_get
*/
#define GET_LOW_FUSE_BITS (0x0000)
/** \ingroup avr_boot
\def GET_LOCK_BITS
address to read the lock bits, using boot_lock_fuse_bits_get
*/
#define GET_LOCK_BITS (0x0001)
/** \ingroup avr_boot
\def GET_EXTENDED_FUSE_BITS
address to read the extended fuse bits, using boot_lock_fuse_bits_get
*/
#define GET_EXTENDED_FUSE_BITS (0x0002)
/** \ingroup avr_boot
\def GET_HIGH_FUSE_BITS
address to read the high fuse bits, using boot_lock_fuse_bits_get
*/
#define GET_HIGH_FUSE_BITS (0x0003)
/** \ingroup avr_boot
\def boot_lock_fuse_bits_get(address)
Read the lock or fuse bits at \c address.
Parameter \c address can be any of GET_LOW_FUSE_BITS,
GET_LOCK_BITS, GET_EXTENDED_FUSE_BITS, or GET_HIGH_FUSE_BITS.
\note The lock and fuse bits returned are the physical values,
i.e. a bit returned as 0 means the corresponding fuse or lock bit
is programmed.
*/
#define boot_lock_fuse_bits_get_short(address) \
(__extension__({ \
uint8_t __result; \
__asm__ __volatile__ \
( \
"ldi r30, %3\n\t" \
"ldi r31, 0\n\t" \
"out %1, %2\n\t" \
"lpm %0, Z\n\t" \
: "=r" (__result) \
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_LOCK_BITS_SET), \
"M" (address) \
: "r0", "r30", "r31" \
); \
__result; \
}))
#define boot_lock_fuse_bits_get(address) \
(__extension__({ \
uint8_t __result; \
__asm__ __volatile__ \
( \
"ldi r30, %3\n\t" \
"ldi r31, 0\n\t" \
"sts %1, %2\n\t" \
"lpm %0, Z\n\t" \
: "=r" (__result) \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t)__BOOT_LOCK_BITS_SET), \
"M" (address) \
: "r0", "r30", "r31" \
); \
__result; \
}))
/** \ingroup avr_boot
\def boot_signature_byte_get(address)
Read the Signature Row byte at \c address. For some MCU types,
this function can also retrieve the factory-stored oscillator
calibration bytes.
Parameter \c address can be 0-0x1f as documented by the datasheet.
\note The values are MCU type dependent.
*/
#define __BOOT_SIGROW_READ (_BV(__SPM_ENABLE) | _BV(SIGRD))
#define boot_signature_byte_get_short(addr) \
(__extension__({ \
uint16_t __addr16 = (uint16_t)(addr); \
uint8_t __result; \
__asm__ __volatile__ \
( \
"out %1, %2\n\t" \
"lpm %0, Z" "\n\t" \
: "=r" (__result) \
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
"r" ((uint8_t) __BOOT_SIGROW_READ), \
"z" (__addr16) \
); \
__result; \
}))
#define boot_signature_byte_get(addr) \
(__extension__({ \
uint16_t __addr16 = (uint16_t)(addr); \
uint8_t __result; \
__asm__ __volatile__ \
( \
"sts %1, %2\n\t" \
"lpm %0, Z" "\n\t" \
: "=r" (__result) \
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
"r" ((uint8_t) __BOOT_SIGROW_READ), \
"z" (__addr16) \
); \
__result; \
}))
/** \ingroup avr_boot
\def boot_page_fill(address, data)
Fill the bootloader temporary page buffer for flash
address with data word.
\note The address is a byte address. The data is a word. The AVR
writes data to the buffer a word at a time, but addresses the buffer
per byte! So, increment your address by 2 between calls, and send 2
data bytes in a word format! The LSB of the data is written to the lower
address; the MSB of the data is written to the higher address.*/
/** \ingroup avr_boot
\def boot_page_erase(address)
Erase the flash page that contains address.
\note address is a byte address in flash, not a word address. */
/** \ingroup avr_boot
\def boot_page_write(address)
Write the bootloader temporary page buffer
to flash page that contains address.
\note address is a byte address in flash, not a word address. */
/** \ingroup avr_boot
\def boot_rww_enable()
Enable the Read-While-Write memory section. */
/** \ingroup avr_boot
\def boot_lock_bits_set(lock_bits)
Set the bootloader lock bits.
\param lock_bits A mask of which Boot Loader Lock Bits to set.
\note In this context, a 'set bit' will be written to a zero value.
Note also that only BLBxx bits can be programmed by this command.
For example, to disallow the SPM instruction from writing to the Boot
Loader memory section of flash, you would use this macro as such:
\code
boot_lock_bits_set (_BV (BLB11));
\endcode
\note Like any lock bits, the Boot Loader Lock Bits, once set,
cannot be cleared again except by a chip erase which will in turn
also erase the boot loader itself. */
/* Normal versions of the macros use 16-bit addresses.
Extended versions of the macros use 32-bit addresses.
Alternate versions of the macros use 16-bit addresses and require special
instruction sequences after LPM.
FLASHEND is defined in the ioXXXX.h file.
USHRT_MAX is defined in <limits.h>. */
#if defined(__AVR_ATmega161__) || defined(__AVR_ATmega163__) \
|| defined(__AVR_ATmega323__)
/* Alternate: ATmega161/163/323 and 16 bit address */
#define boot_page_fill(address, data) __boot_page_fill_alternate(address, data)
#define boot_page_erase(address) __boot_page_erase_alternate(address)
#define boot_page_write(address) __boot_page_write_alternate(address)
#define boot_rww_enable() __boot_rww_enable_alternate()
#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_alternate(lock_bits)
#elif (FLASHEND > USHRT_MAX)
/* Extended: >16 bit address */
#define boot_page_fill(address, data) __boot_page_fill_extended_short(address, data)
#define boot_page_erase(address) __boot_page_erase_extended_short(address)
#define boot_page_write(address) __boot_page_write_extended_short(address)
#define boot_rww_enable() __boot_rww_enable_short()
#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_short(lock_bits)
#else
/* Normal: 16 bit address */
#define boot_page_fill(address, data) __boot_page_fill_short(address, data)
#define boot_page_erase(address) __boot_page_erase_short(address)
#define boot_page_write(address) __boot_page_write_short(address)
#define boot_rww_enable() __boot_rww_enable_short()
#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_short(lock_bits)
#endif
/** \ingroup avr_boot
Same as boot_page_fill() except it waits for eeprom and spm operations to
complete before filling the page. */
#define boot_page_fill_safe(address, data) \
do { \
boot_spm_busy_wait(); \
eeprom_busy_wait(); \
boot_page_fill(address, data); \
} while (0)
/** \ingroup avr_boot
Same as boot_page_erase() except it waits for eeprom and spm operations to
complete before erasing the page. */
#define boot_page_erase_safe(address) \
do { \
boot_spm_busy_wait(); \
eeprom_busy_wait(); \
boot_page_erase (address); \
} while (0)
/** \ingroup avr_boot
Same as boot_page_write() except it waits for eeprom and spm operations to
complete before writing the page. */
#define boot_page_write_safe(address) \
do { \
boot_spm_busy_wait(); \
eeprom_busy_wait(); \
boot_page_write (address); \
} while (0)
/** \ingroup avr_boot
Same as boot_rww_enable() except waits for eeprom and spm operations to
complete before enabling the RWW mameory. */
#define boot_rww_enable_safe() \
do { \
boot_spm_busy_wait(); \
eeprom_busy_wait(); \
boot_rww_enable(); \
} while (0)
/** \ingroup avr_boot
Same as boot_lock_bits_set() except waits for eeprom and spm operations to
complete before setting the lock bits. */
#define boot_lock_bits_set_safe(lock_bits) \
do { \
boot_spm_busy_wait(); \
eeprom_busy_wait(); \
boot_lock_bits_set (lock_bits); \
} while (0)
#endif /* _AVR_BOOT_H_ */

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..\..\..\tools\avr\utils\bin\make OS=windows ENV=arduino %*

673
optiboot/optiboot.c Normal file
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/**********************************************************/
/* Optiboot bootloader for Arduino */
/* */
/* http://optiboot.googlecode.com */
/* */
/* Arduino-maintained version : See README.TXT */
/* http://code.google.com/p/arduino/ */
/* */
/* Heavily optimised bootloader that is faster and */
/* smaller than the Arduino standard bootloader */
/* */
/* Enhancements: */
/* Fits in 512 bytes, saving 1.5K of code space */
/* Background page erasing speeds up programming */
/* Higher baud rate speeds up programming */
/* Written almost entirely in C */
/* Customisable timeout with accurate timeconstant */
/* Optional virtual UART. No hardware UART required. */
/* Optional virtual boot partition for devices without. */
/* */
/* What you lose: */
/* Implements a skeleton STK500 protocol which is */
/* missing several features including EEPROM */
/* programming and non-page-aligned writes */
/* High baud rate breaks compatibility with standard */
/* Arduino flash settings */
/* */
/* Fully supported: */
/* ATmega168 based devices (Diecimila etc) */
/* ATmega328P based devices (Duemilanove etc) */
/* */
/* Alpha test */
/* ATmega1280 based devices (Arduino Mega) */
/* */
/* Work in progress: */
/* ATmega644P based devices (Sanguino) */
/* ATtiny84 based devices (Luminet) */
/* */
/* Does not support: */
/* USB based devices (eg. Teensy) */
/* */
/* Assumptions: */
/* The code makes several assumptions that reduce the */
/* code size. They are all true after a hardware reset, */
/* but may not be true if the bootloader is called by */
/* other means or on other hardware. */
/* No interrupts can occur */
/* UART and Timer 1 are set to their reset state */
/* SP points to RAMEND */
/* */
/* Code builds on code, libraries and optimisations from: */
/* stk500boot.c by Jason P. Kyle */
/* Arduino bootloader http://arduino.cc */
/* Spiff's 1K bootloader http://spiffie.org/know/arduino_1k_bootloader/bootloader.shtml */
/* avr-libc project http://nongnu.org/avr-libc */
/* Adaboot http://www.ladyada.net/library/arduino/bootloader.html */
/* AVR305 Atmel Application Note */
/* */
/* This program is free software; you can redistribute it */
/* and/or modify it under the terms of the GNU General */
/* Public License as published by the Free Software */
/* Foundation; either version 2 of the License, or */
/* (at your option) any later version. */
/* */
/* This program is distributed in the hope that it will */
/* be useful, but WITHOUT ANY WARRANTY; without even the */
/* implied warranty of MERCHANTABILITY or FITNESS FOR A */
/* PARTICULAR PURPOSE. See the GNU General Public */
/* License for more details. */
/* */
/* You should have received a copy of the GNU General */
/* Public License along with this program; if not, write */
/* to the Free Software Foundation, Inc., */
/* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */
/* */
/* Licence can be viewed at */
/* http://www.fsf.org/licenses/gpl.txt */
/* */
/**********************************************************/
/**********************************************************/
/* */
/* Optional defines: */
/* */
/**********************************************************/
/* */
/* BIG_BOOT: */
/* Build a 1k bootloader, not 512 bytes. This turns on */
/* extra functionality. */
/* */
/* BAUD_RATE: */
/* Set bootloader baud rate. */
/* */
/* LUDICROUS_SPEED: */
/* 230400 baud :-) */
/* */
/* SOFT_UART: */
/* Use AVR305 soft-UART instead of hardware UART. */
/* */
/* LED_START_FLASHES: */
/* Number of LED flashes on bootup. */
/* */
/* LED_DATA_FLASH: */
/* Flash LED when transferring data. For boards without */
/* TX or RX LEDs, or for people who like blinky lights. */
/* */
/* SUPPORT_EEPROM: */
/* Support reading and writing from EEPROM. This is not */
/* used by Arduino, so off by default. */
/* */
/* TIMEOUT_MS: */
/* Bootloader timeout period, in milliseconds. */
/* 500,1000,2000,4000,8000 supported. */
/* */
/**********************************************************/
/**********************************************************/
/* Version Numbers! */
/* */
/* Arduino Optiboot now includes this Version number in */
/* the source and object code. */
/* */
/* Version 3 was released as zip from the optiboot */
/* repository and was distributed with Arduino 0022. */
/* Version 4 starts with the arduino repository commit */
/* that brought the arduino repository up-to-date with */
/* the optiboot source tree changes since v3. */
/* */
/**********************************************************/
/**********************************************************/
/* Edit History: */
/* */
/* 4.4 WestfW: add initialization of address to keep */
/* the compiler happy. Change SC'ed targets. */
/* Return the SW version via READ PARAM */
/* 4.3 WestfW: catch framing errors in getch(), so that */
/* AVRISP works without HW kludges. */
/* http://code.google.com/p/arduino/issues/detail?id=368n*/
/* 4.2 WestfW: reduce code size, fix timeouts, change */
/* verifySpace to use WDT instead of appstart */
/* 4.1 WestfW: put version number in binary. */
/**********************************************************/
#define OPTIBOOT_MAJVER 4
#define OPTIBOOT_MINVER 4
#define MAKESTR(a) #a
#define MAKEVER(a, b) MAKESTR(a*256+b)
asm(" .section .version\n"
"optiboot_version: .word " MAKEVER(OPTIBOOT_MAJVER, OPTIBOOT_MINVER) "\n"
" .section .text\n");
#include <inttypes.h>
#include <avr/io.h>
#include <avr/pgmspace.h>
// <avr/boot.h> uses sts instructions, but this version uses out instructions
// This saves cycles and program memory.
#include "boot.h"
// We don't use <avr/wdt.h> as those routines have interrupt overhead we don't need.
#include "pin_defs.h"
#include "stk500.h"
#ifndef LED_START_FLASHES
#define LED_START_FLASHES 0
#endif
#ifdef LUDICROUS_SPEED
#define BAUD_RATE 230400L
#endif
/* set the UART baud rate defaults */
#ifndef BAUD_RATE
#if F_CPU >= 8000000L
#define BAUD_RATE 115200L // Highest rate Avrdude win32 will support
#elsif F_CPU >= 1000000L
#define BAUD_RATE 9600L // 19200 also supported, but with significant error
#elsif F_CPU >= 128000L
#define BAUD_RATE 4800L // Good for 128kHz internal RC
#else
#define BAUD_RATE 1200L // Good even at 32768Hz
#endif
#endif
/* Switch in soft UART for hard baud rates
#if (F_CPU/BAUD_RATE) > 280 // > 57600 for 16MHz
#ifndef SOFT_UART
#define SOFT_UART
#endif
#endif
*/
/* Watchdog settings */
#define WATCHDOG_OFF (0)
#define WATCHDOG_16MS (_BV(WDE))
#define WATCHDOG_32MS (_BV(WDP0) | _BV(WDE))
#define WATCHDOG_64MS (_BV(WDP1) | _BV(WDE))
#define WATCHDOG_125MS (_BV(WDP1) | _BV(WDP0) | _BV(WDE))
#define WATCHDOG_250MS (_BV(WDP2) | _BV(WDE))
#define WATCHDOG_500MS (_BV(WDP2) | _BV(WDP0) | _BV(WDE))
#define WATCHDOG_1S (_BV(WDP2) | _BV(WDP1) | _BV(WDE))
#define WATCHDOG_2S (_BV(WDP2) | _BV(WDP1) | _BV(WDP0) | _BV(WDE))
#ifndef __AVR_ATmega8__
#define WATCHDOG_4S (_BV(WDP3) | _BV(WDE))
#define WATCHDOG_8S (_BV(WDP3) | _BV(WDP0) | _BV(WDE))
#endif
/* Function Prototypes */
/* The main function is in init9, which removes the interrupt vector table */
/* we don't need. It is also 'naked', which means the compiler does not */
/* generate any entry or exit code itself. */
int main(void) __attribute__ ((naked)) __attribute__ ((section (".init9")));
void putch(char);
uint8_t getch(void);
static inline void getNch(uint8_t); /* "static inline" is a compiler hint to reduce code size */
void verifySpace();
static inline void flash_led(uint8_t);
uint8_t getLen();
static inline void watchdogReset();
void watchdogConfig(uint8_t x);
#ifdef SOFT_UART
void uartDelay() __attribute__ ((naked));
#endif
void appStart() __attribute__ ((naked));
#if defined(__AVR_ATmega168__)
#define RAMSTART (0x100)
#define NRWWSTART (0x3800)
#elif defined(__AVR_ATmega328P__)
#define RAMSTART (0x100)
#define NRWWSTART (0x7000)
#elif defined (__AVR_ATmega644P__)
#define RAMSTART (0x100)
#define NRWWSTART (0xE000)
#elif defined(__AVR_ATtiny84__)
#define RAMSTART (0x100)
#define NRWWSTART (0x0000)
#elif defined(__AVR_ATmega1280__)
#define RAMSTART (0x200)
#define NRWWSTART (0xE000)
#elif defined(__AVR_ATmega8__) || defined(__AVR_ATmega88__)
#define RAMSTART (0x100)
#define NRWWSTART (0x1800)
#endif
/* C zero initialises all global variables. However, that requires */
/* These definitions are NOT zero initialised, but that doesn't matter */
/* This allows us to drop the zero init code, saving us memory */
#define buff ((uint8_t*)(RAMSTART))
#ifdef VIRTUAL_BOOT_PARTITION
#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
#endif
/* main program starts here */
int main(void) {
uint8_t ch;
/*
* Making these local and in registers prevents the need for initializing
* them, and also saves space because code no longer stores to memory.
* (initializing address keeps the compiler happy, but isn't really
* necessary, and uses 4 bytes of flash.)
*/
register uint16_t address = 0;
register uint8_t length;
// After the zero init loop, this is the first code to run.
//
// This code makes the following assumptions:
// No interrupts will execute
// SP points to RAMEND
// r1 contains zero
//
// If not, uncomment the following instructions:
// cli();
asm volatile ("clr __zero_reg__");
#ifdef __AVR_ATmega8__
SP=RAMEND; // This is done by hardware reset
#endif
// Adaboot no-wait mod
ch = MCUSR;
MCUSR = 0;
if (!(ch & _BV(EXTRF))) appStart();
#if LED_START_FLASHES > 0
// Set up Timer 1 for timeout counter
TCCR1B = _BV(CS12) | _BV(CS10); // div 1024
#endif
#ifndef SOFT_UART
#ifdef __AVR_ATmega8__
UCSRA = _BV(U2X); //Double speed mode USART
UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx
UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1
UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
#else
UCSR0A = _BV(U2X0); //Double speed mode USART0
UCSR0B = _BV(RXEN0) | _BV(TXEN0);
UCSR0C = _BV(UCSZ00) | _BV(UCSZ01);
UBRR0L = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
#endif
#endif
// Set up watchdog to trigger after 500ms
watchdogConfig(WATCHDOG_1S);
/* Set LED pin as output */
LED_DDR |= _BV(LED);
#ifdef SOFT_UART
/* Set TX pin as output */
UART_DDR |= _BV(UART_TX_BIT);
#endif
#if LED_START_FLASHES > 0
/* Flash onboard LED to signal entering of bootloader */
flash_led(LED_START_FLASHES * 2);
#endif
/* Forever loop */
for (;;) {
/* get character from UART */
ch = getch();
if(ch == STK_GET_PARAMETER) {
unsigned char which = getch();
verifySpace();
if (which == 0x82) {
/*
* Send optiboot version as "minor SW version"
*/
putch(OPTIBOOT_MINVER);
} else if (which == 0x81) {
putch(OPTIBOOT_MAJVER);
} else {
/*
* GET PARAMETER returns a generic 0x03 reply for
* other parameters - enough to keep Avrdude happy
*/
putch(0x03);
}
}
else if(ch == STK_SET_DEVICE) {
// SET DEVICE is ignored
getNch(20);
}
else if(ch == STK_SET_DEVICE_EXT) {
// SET DEVICE EXT is ignored
getNch(5);
}
else if(ch == STK_LOAD_ADDRESS) {
// LOAD ADDRESS
uint16_t newAddress;
newAddress = getch();
newAddress = (newAddress & 0xff) | (getch() << 8);
#ifdef RAMPZ
// Transfer top bit to RAMPZ
RAMPZ = (newAddress & 0x8000) ? 1 : 0;
#endif
newAddress += newAddress; // Convert from word address to byte address
address = newAddress;
verifySpace();
}
else if(ch == STK_UNIVERSAL) {
// UNIVERSAL command is ignored
getNch(4);
putch(0x00);
}
/* Write memory, length is big endian and is in bytes */
else if(ch == STK_PROG_PAGE) {
// PROGRAM PAGE - we support flash programming only, not EEPROM
uint8_t *bufPtr;
uint16_t addrPtr;
getch(); /* getlen() */
length = getch();
getch();
// If we are in RWW section, immediately start page erase
if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
// While that is going on, read in page contents
bufPtr = buff;
do *bufPtr++ = getch();
while (--length);
// If we are in NRWW section, page erase has to be delayed until now.
// Todo: Take RAMPZ into account
if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
// Read command terminator, start reply
verifySpace();
// If only a partial page is to be programmed, the erase might not be complete.
// So check that here
boot_spm_busy_wait();
#ifdef VIRTUAL_BOOT_PARTITION
if ((uint16_t)(void*)address == 0) {
// This is the reset vector page. We need to live-patch the code so the
// bootloader runs.
//
// Move RESET vector to WDT vector
uint16_t vect = buff[0] | (buff[1]<<8);
rstVect = vect;
wdtVect = buff[8] | (buff[9]<<8);
vect -= 4; // Instruction is a relative jump (rjmp), so recalculate.
buff[8] = vect & 0xff;
buff[9] = vect >> 8;
// Add jump to bootloader at RESET vector
buff[0] = 0x7f;
buff[1] = 0xce; // rjmp 0x1d00 instruction
}
#endif
// Copy buffer into programming buffer
bufPtr = buff;
addrPtr = (uint16_t)(void*)address;
ch = SPM_PAGESIZE / 2;
do {
uint16_t a;
a = *bufPtr++;
a |= (*bufPtr++) << 8;
__boot_page_fill_short((uint16_t)(void*)addrPtr,a);
addrPtr += 2;
} while (--ch);
// Write from programming buffer
__boot_page_write_short((uint16_t)(void*)address);
boot_spm_busy_wait();
#if defined(RWWSRE)
// Reenable read access to flash
boot_rww_enable();
#endif
}
/* Read memory block mode, length is big endian. */
else if(ch == STK_READ_PAGE) {
// READ PAGE - we only read flash
getch(); /* getlen() */
length = getch();
getch();
verifySpace();
#ifdef VIRTUAL_BOOT_PARTITION
do {
// Undo vector patch in bottom page so verify passes
if (address == 0) ch=rstVect & 0xff;
else if (address == 1) ch=rstVect >> 8;
else if (address == 8) ch=wdtVect & 0xff;
else if (address == 9) ch=wdtVect >> 8;
else ch = pgm_read_byte_near(address);
address++;
putch(ch);
} while (--length);
#else
#ifdef __AVR_ATmega1280__
// do putch(pgm_read_byte_near(address++));
// while (--length);
do {
uint8_t result;
__asm__ ("elpm %0,Z\n":"=r"(result):"z"(address));
putch(result);
address++;
}
while (--length);
#else
do putch(pgm_read_byte_near(address++));
while (--length);
#endif
#endif
}
/* Get device signature bytes */
else if(ch == STK_READ_SIGN) {
// READ SIGN - return what Avrdude wants to hear
verifySpace();
putch(SIGNATURE_0);
putch(SIGNATURE_1);
putch(SIGNATURE_2);
}
else if (ch == 'Q') {
// Adaboot no-wait mod
watchdogConfig(WATCHDOG_16MS);
verifySpace();
}
else {
// This covers the response to commands like STK_ENTER_PROGMODE
verifySpace();
}
putch(STK_OK);
}
}
void putch(char ch) {
#ifndef SOFT_UART
while (!(UCSR0A & _BV(UDRE0)));
UDR0 = ch;
#else
__asm__ __volatile__ (
" com %[ch]\n" // ones complement, carry set
" sec\n"
"1: brcc 2f\n"
" cbi %[uartPort],%[uartBit]\n"
" rjmp 3f\n"
"2: sbi %[uartPort],%[uartBit]\n"
" nop\n"
"3: rcall uartDelay\n"
" rcall uartDelay\n"
" lsr %[ch]\n"
" dec %[bitcnt]\n"
" brne 1b\n"
:
:
[bitcnt] "d" (10),
[ch] "r" (ch),
[uartPort] "I" (_SFR_IO_ADDR(UART_PORT)),
[uartBit] "I" (UART_TX_BIT)
:
"r25"
);
#endif
}
uint8_t getch(void) {
uint8_t ch;
#ifdef LED_DATA_FLASH
#ifdef __AVR_ATmega8__
LED_PORT ^= _BV(LED);
#else
LED_PIN |= _BV(LED);
#endif
#endif
#ifdef SOFT_UART
__asm__ __volatile__ (
"1: sbic %[uartPin],%[uartBit]\n" // Wait for start edge
" rjmp 1b\n"
" rcall uartDelay\n" // Get to middle of start bit
"2: rcall uartDelay\n" // Wait 1 bit period
" rcall uartDelay\n" // Wait 1 bit period
" clc\n"
" sbic %[uartPin],%[uartBit]\n"
" sec\n"
" dec %[bitCnt]\n"
" breq 3f\n"
" ror %[ch]\n"
" rjmp 2b\n"
"3:\n"
:
[ch] "=r" (ch)
:
[bitCnt] "d" (9),
[uartPin] "I" (_SFR_IO_ADDR(UART_PIN)),
[uartBit] "I" (UART_RX_BIT)
:
"r25"
);
#else
while(!(UCSR0A & _BV(RXC0)))
;
if (!(UCSR0A & _BV(FE0))) {
/*
* A Framing Error indicates (probably) that something is talking
* to us at the wrong bit rate. Assume that this is because it
* expects to be talking to the application, and DON'T reset the
* watchdog. This should cause the bootloader to abort and run
* the application "soon", if it keeps happening. (Note that we
* don't care that an invalid char is returned...)
*/
watchdogReset();
}
ch = UDR0;
#endif
#ifdef LED_DATA_FLASH
#ifdef __AVR_ATmega8__
LED_PORT ^= _BV(LED);
#else
LED_PIN |= _BV(LED);
#endif
#endif
return ch;
}
#ifdef SOFT_UART
// AVR350 equation: #define UART_B_VALUE (((F_CPU/BAUD_RATE)-23)/6)
// Adding 3 to numerator simulates nearest rounding for more accurate baud rates
#define UART_B_VALUE (((F_CPU/BAUD_RATE)-20)/6)
#if UART_B_VALUE > 255
#error Baud rate too slow for soft UART
#endif
void uartDelay() {
__asm__ __volatile__ (
"ldi r25,%[count]\n"
"1:dec r25\n"
"brne 1b\n"
"ret\n"
::[count] "M" (UART_B_VALUE)
);
}
#endif
void getNch(uint8_t count) {
do getch(); while (--count);
verifySpace();
}
void verifySpace() {
if (getch() != CRC_EOP) {
watchdogConfig(WATCHDOG_16MS); // shorten WD timeout
while (1) // and busy-loop so that WD causes
; // a reset and app start.
}
putch(STK_INSYNC);
}
#if LED_START_FLASHES > 0
void flash_led(uint8_t count) {
do {
TCNT1 = -(F_CPU/(1024*16));
TIFR1 = _BV(TOV1);
while(!(TIFR1 & _BV(TOV1)));
#ifdef __AVR_ATmega8__
LED_PORT ^= _BV(LED);
#else
LED_PIN |= _BV(LED);
#endif
watchdogReset();
} while (--count);
}
#endif
// Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() {
__asm__ __volatile__ (
"wdr\n"
);
}
void watchdogConfig(uint8_t x) {
WDTCSR = _BV(WDCE) | _BV(WDE);
WDTCSR = x;
}
void appStart() {
watchdogConfig(WATCHDOG_OFF);
__asm__ __volatile__ (
#ifdef VIRTUAL_BOOT_PARTITION
// Jump to WDT vector
"ldi r30,4\n"
"clr r31\n"
#else
// Jump to RST vector
"clr r30\n"
"clr r31\n"
#endif
"ijmp\n"
);
}

31
optiboot/optiboot_kaboard.hex Normal file
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@ -0,0 +1,31 @@
:101E000011248FE594E09EBF8DBF84B714BE81FF7F
:101E1000D0D082E08BB988E18AB986E880BD80E1C4
:101E200089B98EE0B3D0BD9A812C912CEE24E39435
:101E300095E0D92E21E1C22E33E0F32EA0D08134DB
:101E400089F49DD08983A6D08981823819F484E0F1
:101E500092D08EC0813819F484E08DD089C083E09F
:101E60008AD086C0823419F484E19CD081C0853444
:101E700019F485E097D07CC0853549F480D0882E50
:101E80007ED0912C982A880C991C84D071C08635FC
:101E900029F484E087D080E06ED06AC0843609F0EF
:101EA0003DC06DD06CD0B82E6AD0811488E1980600
:101EB00030F4F401F7BEE89500E011E002C000E064
:101EC00011E05DD0F80181938F01BE12FACF811429
:101ED000F8E19F0618F0F401F7BEE8955BD007B66D
:101EE00000FCFDCFF401A0E0B1E08C9111962C91A3
:101EF000119790E0922B12960C01E7BEE895112401
:101F00003296A03481E0B80781F7F401D7BEE89596
:101F100007B600FCFDCFC7BEE8952AC08437B9F4E8
:101F20002ED02DD0B82E2BD035D0F401A82CAB0C50
:101F30008F010F5F1F4F84911ED0F801A012F8CFC0
:101F4000FFEF8F1A9F0ABA948B0C911C11C0853732
:101F500041F420D08EE10FD083E90DD087E00BD083
:101F600007C0813521F488E011D014D001C012D00F
:101F700080E101D063CF5D9BFECF8CB908955F9B5C
:101F8000FECF5C9901C0A8958CB1089598E191BDF0
:101F900081BD0895F4DF803219F088E0F7DFFFCFCC
:101FA00084E1E9CFCF93C82FEADFC150E9F7CF91A1
:0C1FB000F1CF80E0EBDFEE27FF27099463
:021FFE000404D9
:0400000300001E00DB
:00000001FF

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optiboot_kaboard.elf: file format elf32-avr
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 000001bc 00001e00 00001e00 00000074 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .version 00000002 00001ffe 00001ffe 00000230 2**0
CONTENTS, READONLY
2 .data 00000000 00800060 00001fbc 00000230 2**0
CONTENTS, ALLOC, LOAD, DATA
3 .stab 00000a74 00000000 00000000 00000234 2**2
CONTENTS, READONLY, DEBUGGING
4 .stabstr 00000899 00000000 00000000 00000ca8 2**0
CONTENTS, READONLY, DEBUGGING
5 .comment 00000011 00000000 00000000 00001541 2**0
CONTENTS, READONLY
Disassembly of section .text:
00001e00 <main>:
1e00: 11 24 eor r1, r1
1e02: 8f e5 ldi r24, 0x5F ; 95
1e04: 94 e0 ldi r25, 0x04 ; 4
1e06: 9e bf out 0x3e, r25 ; 62
1e08: 8d bf out 0x3d, r24 ; 61
1e0a: 84 b7 in r24, 0x34 ; 52
1e0c: 14 be out 0x34, r1 ; 52
1e0e: 81 ff sbrs r24, 1
1e10: d0 d0 rcall .+416 ; 0x1fb2 <appStart>
1e12: 82 e0 ldi r24, 0x02 ; 2
1e14: 8b b9 out 0x0b, r24 ; 11
1e16: 88 e1 ldi r24, 0x18 ; 24
1e18: 8a b9 out 0x0a, r24 ; 10
1e1a: 86 e8 ldi r24, 0x86 ; 134
1e1c: 80 bd out 0x20, r24 ; 32
1e1e: 80 e1 ldi r24, 0x10 ; 16
1e20: 89 b9 out 0x09, r24 ; 9
1e22: 8e e0 ldi r24, 0x0E ; 14
1e24: b3 d0 rcall .+358 ; 0x1f8c <watchdogConfig>
1e26: bd 9a sbi 0x17, 5 ; 23
1e28: 81 2c mov r8, r1
1e2a: 91 2c mov r9, r1
1e2c: ee 24 eor r14, r14
1e2e: e3 94 inc r14
1e30: 95 e0 ldi r25, 0x05 ; 5
1e32: d9 2e mov r13, r25
1e34: 21 e1 ldi r18, 0x11 ; 17
1e36: c2 2e mov r12, r18
1e38: 33 e0 ldi r19, 0x03 ; 3
1e3a: f3 2e mov r15, r19
1e3c: a0 d0 rcall .+320 ; 0x1f7e <getch>
1e3e: 81 34 cpi r24, 0x41 ; 65
1e40: 89 f4 brne .+34 ; 0x1e64 <main+0x64>
1e42: 9d d0 rcall .+314 ; 0x1f7e <getch>
1e44: 89 83 std Y+1, r24 ; 0x01
1e46: a6 d0 rcall .+332 ; 0x1f94 <verifySpace>
1e48: 89 81 ldd r24, Y+1 ; 0x01
1e4a: 82 38 cpi r24, 0x82 ; 130
1e4c: 19 f4 brne .+6 ; 0x1e54 <main+0x54>
1e4e: 84 e0 ldi r24, 0x04 ; 4
1e50: 92 d0 rcall .+292 ; 0x1f76 <putch>
1e52: 8e c0 rjmp .+284 ; 0x1f70 <main+0x170>
1e54: 81 38 cpi r24, 0x81 ; 129
1e56: 19 f4 brne .+6 ; 0x1e5e <main+0x5e>
1e58: 84 e0 ldi r24, 0x04 ; 4
1e5a: 8d d0 rcall .+282 ; 0x1f76 <putch>
1e5c: 89 c0 rjmp .+274 ; 0x1f70 <main+0x170>
1e5e: 83 e0 ldi r24, 0x03 ; 3
1e60: 8a d0 rcall .+276 ; 0x1f76 <putch>
1e62: 86 c0 rjmp .+268 ; 0x1f70 <main+0x170>
1e64: 82 34 cpi r24, 0x42 ; 66
1e66: 19 f4 brne .+6 ; 0x1e6e <main+0x6e>
1e68: 84 e1 ldi r24, 0x14 ; 20
1e6a: 9c d0 rcall .+312 ; 0x1fa4 <getNch>
1e6c: 81 c0 rjmp .+258 ; 0x1f70 <main+0x170>
1e6e: 85 34 cpi r24, 0x45 ; 69
1e70: 19 f4 brne .+6 ; 0x1e78 <main+0x78>
1e72: 85 e0 ldi r24, 0x05 ; 5
1e74: 97 d0 rcall .+302 ; 0x1fa4 <getNch>
1e76: 7c c0 rjmp .+248 ; 0x1f70 <main+0x170>
1e78: 85 35 cpi r24, 0x55 ; 85
1e7a: 49 f4 brne .+18 ; 0x1e8e <main+0x8e>
1e7c: 80 d0 rcall .+256 ; 0x1f7e <getch>
1e7e: 88 2e mov r8, r24
1e80: 7e d0 rcall .+252 ; 0x1f7e <getch>
1e82: 91 2c mov r9, r1
1e84: 98 2a or r9, r24
1e86: 88 0c add r8, r8
1e88: 99 1c adc r9, r9
1e8a: 84 d0 rcall .+264 ; 0x1f94 <verifySpace>
1e8c: 71 c0 rjmp .+226 ; 0x1f70 <main+0x170>
1e8e: 86 35 cpi r24, 0x56 ; 86
1e90: 29 f4 brne .+10 ; 0x1e9c <main+0x9c>
1e92: 84 e0 ldi r24, 0x04 ; 4
1e94: 87 d0 rcall .+270 ; 0x1fa4 <getNch>
1e96: 80 e0 ldi r24, 0x00 ; 0
1e98: 6e d0 rcall .+220 ; 0x1f76 <putch>
1e9a: 6a c0 rjmp .+212 ; 0x1f70 <main+0x170>
1e9c: 84 36 cpi r24, 0x64 ; 100
1e9e: 09 f0 breq .+2 ; 0x1ea2 <main+0xa2>
1ea0: 3d c0 rjmp .+122 ; 0x1f1c <main+0x11c>
1ea2: 6d d0 rcall .+218 ; 0x1f7e <getch>
1ea4: 6c d0 rcall .+216 ; 0x1f7e <getch>
1ea6: b8 2e mov r11, r24
1ea8: 6a d0 rcall .+212 ; 0x1f7e <getch>
1eaa: 81 14 cp r8, r1
1eac: 88 e1 ldi r24, 0x18 ; 24
1eae: 98 06 cpc r9, r24
1eb0: 30 f4 brcc .+12 ; 0x1ebe <main+0xbe>
1eb2: f4 01 movw r30, r8
1eb4: f7 be out 0x37, r15 ; 55
1eb6: e8 95 spm
1eb8: 00 e0 ldi r16, 0x00 ; 0
1eba: 11 e0 ldi r17, 0x01 ; 1
1ebc: 02 c0 rjmp .+4 ; 0x1ec2 <main+0xc2>
1ebe: 00 e0 ldi r16, 0x00 ; 0
1ec0: 11 e0 ldi r17, 0x01 ; 1
1ec2: 5d d0 rcall .+186 ; 0x1f7e <getch>
1ec4: f8 01 movw r30, r16
1ec6: 81 93 st Z+, r24
1ec8: 8f 01 movw r16, r30
1eca: be 12 cpse r11, r30
1ecc: fa cf rjmp .-12 ; 0x1ec2 <main+0xc2>
1ece: 81 14 cp r8, r1
1ed0: f8 e1 ldi r31, 0x18 ; 24
1ed2: 9f 06 cpc r9, r31
1ed4: 18 f0 brcs .+6 ; 0x1edc <main+0xdc>
1ed6: f4 01 movw r30, r8
1ed8: f7 be out 0x37, r15 ; 55
1eda: e8 95 spm
1edc: 5b d0 rcall .+182 ; 0x1f94 <verifySpace>
1ede: 07 b6 in r0, 0x37 ; 55
1ee0: 00 fc sbrc r0, 0
1ee2: fd cf rjmp .-6 ; 0x1ede <main+0xde>
1ee4: f4 01 movw r30, r8
1ee6: a0 e0 ldi r26, 0x00 ; 0
1ee8: b1 e0 ldi r27, 0x01 ; 1
1eea: 8c 91 ld r24, X
1eec: 11 96 adiw r26, 0x01 ; 1
1eee: 2c 91 ld r18, X
1ef0: 11 97 sbiw r26, 0x01 ; 1
1ef2: 90 e0 ldi r25, 0x00 ; 0
1ef4: 92 2b or r25, r18
1ef6: 12 96 adiw r26, 0x02 ; 2
1ef8: 0c 01 movw r0, r24
1efa: e7 be out 0x37, r14 ; 55
1efc: e8 95 spm
1efe: 11 24 eor r1, r1
1f00: 32 96 adiw r30, 0x02 ; 2
1f02: a0 34 cpi r26, 0x40 ; 64
1f04: 81 e0 ldi r24, 0x01 ; 1
1f06: b8 07 cpc r27, r24
1f08: 81 f7 brne .-32 ; 0x1eea <main+0xea>
1f0a: f4 01 movw r30, r8
1f0c: d7 be out 0x37, r13 ; 55
1f0e: e8 95 spm
1f10: 07 b6 in r0, 0x37 ; 55
1f12: 00 fc sbrc r0, 0
1f14: fd cf rjmp .-6 ; 0x1f10 <main+0x110>
1f16: c7 be out 0x37, r12 ; 55
1f18: e8 95 spm
1f1a: 2a c0 rjmp .+84 ; 0x1f70 <main+0x170>
1f1c: 84 37 cpi r24, 0x74 ; 116
1f1e: b9 f4 brne .+46 ; 0x1f4e <main+0x14e>
1f20: 2e d0 rcall .+92 ; 0x1f7e <getch>
1f22: 2d d0 rcall .+90 ; 0x1f7e <getch>
1f24: b8 2e mov r11, r24
1f26: 2b d0 rcall .+86 ; 0x1f7e <getch>
1f28: 35 d0 rcall .+106 ; 0x1f94 <verifySpace>
1f2a: f4 01 movw r30, r8
1f2c: a8 2c mov r10, r8
1f2e: ab 0c add r10, r11
1f30: 8f 01 movw r16, r30
1f32: 0f 5f subi r16, 0xFF ; 255
1f34: 1f 4f sbci r17, 0xFF ; 255
1f36: 84 91 lpm r24, Z
1f38: 1e d0 rcall .+60 ; 0x1f76 <putch>
1f3a: f8 01 movw r30, r16
1f3c: a0 12 cpse r10, r16
1f3e: f8 cf rjmp .-16 ; 0x1f30 <main+0x130>
1f40: ff ef ldi r31, 0xFF ; 255
1f42: 8f 1a sub r8, r31
1f44: 9f 0a sbc r9, r31
1f46: ba 94 dec r11
1f48: 8b 0c add r8, r11
1f4a: 91 1c adc r9, r1
1f4c: 11 c0 rjmp .+34 ; 0x1f70 <main+0x170>
1f4e: 85 37 cpi r24, 0x75 ; 117
1f50: 41 f4 brne .+16 ; 0x1f62 <main+0x162>
1f52: 20 d0 rcall .+64 ; 0x1f94 <verifySpace>
1f54: 8e e1 ldi r24, 0x1E ; 30
1f56: 0f d0 rcall .+30 ; 0x1f76 <putch>
1f58: 83 e9 ldi r24, 0x93 ; 147
1f5a: 0d d0 rcall .+26 ; 0x1f76 <putch>
1f5c: 87 e0 ldi r24, 0x07 ; 7
1f5e: 0b d0 rcall .+22 ; 0x1f76 <putch>
1f60: 07 c0 rjmp .+14 ; 0x1f70 <main+0x170>
1f62: 81 35 cpi r24, 0x51 ; 81
1f64: 21 f4 brne .+8 ; 0x1f6e <main+0x16e>
1f66: 88 e0 ldi r24, 0x08 ; 8
1f68: 11 d0 rcall .+34 ; 0x1f8c <watchdogConfig>
1f6a: 14 d0 rcall .+40 ; 0x1f94 <verifySpace>
1f6c: 01 c0 rjmp .+2 ; 0x1f70 <main+0x170>
1f6e: 12 d0 rcall .+36 ; 0x1f94 <verifySpace>
1f70: 80 e1 ldi r24, 0x10 ; 16
1f72: 01 d0 rcall .+2 ; 0x1f76 <putch>
1f74: 63 cf rjmp .-314 ; 0x1e3c <main+0x3c>
00001f76 <putch>:
}
}
void putch(char ch) {
#ifndef SOFT_UART
while (!(UCSR0A & _BV(UDRE0)));
1f76: 5d 9b sbis 0x0b, 5 ; 11
1f78: fe cf rjmp .-4 ; 0x1f76 <putch>
UDR0 = ch;
1f7a: 8c b9 out 0x0c, r24 ; 12
1f7c: 08 95 ret
00001f7e <getch>:
[uartBit] "I" (UART_RX_BIT)
:
"r25"
);
#else
while(!(UCSR0A & _BV(RXC0)))
1f7e: 5f 9b sbis 0x0b, 7 ; 11
1f80: fe cf rjmp .-4 ; 0x1f7e <getch>
;
if (!(UCSR0A & _BV(FE0))) {
1f82: 5c 99 sbic 0x0b, 4 ; 11
1f84: 01 c0 rjmp .+2 ; 0x1f88 <getch+0xa>
}
#endif
// Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() {
__asm__ __volatile__ (
1f86: a8 95 wdr
* don't care that an invalid char is returned...)
*/
watchdogReset();
}
ch = UDR0;
1f88: 8c b1 in r24, 0x0c ; 12
LED_PIN |= _BV(LED);
#endif
#endif
return ch;
}
1f8a: 08 95 ret
00001f8c <watchdogConfig>:
"wdr\n"
);
}
void watchdogConfig(uint8_t x) {
WDTCSR = _BV(WDCE) | _BV(WDE);
1f8c: 98 e1 ldi r25, 0x18 ; 24
1f8e: 91 bd out 0x21, r25 ; 33
WDTCSR = x;
1f90: 81 bd out 0x21, r24 ; 33
1f92: 08 95 ret
00001f94 <verifySpace>:
do getch(); while (--count);
verifySpace();
}
void verifySpace() {
if (getch() != CRC_EOP) {
1f94: f4 df rcall .-24 ; 0x1f7e <getch>
1f96: 80 32 cpi r24, 0x20 ; 32
1f98: 19 f0 breq .+6 ; 0x1fa0 <verifySpace+0xc>
watchdogConfig(WATCHDOG_16MS); // shorten WD timeout
1f9a: 88 e0 ldi r24, 0x08 ; 8
1f9c: f7 df rcall .-18 ; 0x1f8c <watchdogConfig>
1f9e: ff cf rjmp .-2 ; 0x1f9e <verifySpace+0xa>
while (1) // and busy-loop so that WD causes
; // a reset and app start.
}
putch(STK_INSYNC);
1fa0: 84 e1 ldi r24, 0x14 ; 20
1fa2: e9 cf rjmp .-46 ; 0x1f76 <putch>
00001fa4 <getNch>:
::[count] "M" (UART_B_VALUE)
);
}
#endif
void getNch(uint8_t count) {
1fa4: cf 93 push r28
1fa6: c8 2f mov r28, r24
do getch(); while (--count);
1fa8: ea df rcall .-44 ; 0x1f7e <getch>
1faa: c1 50 subi r28, 0x01 ; 1
1fac: e9 f7 brne .-6 ; 0x1fa8 <getNch+0x4>
verifySpace();
}
1fae: cf 91 pop r28
}
#endif
void getNch(uint8_t count) {
do getch(); while (--count);
verifySpace();
1fb0: f1 cf rjmp .-30 ; 0x1f94 <verifySpace>
00001fb2 <appStart>:
WDTCSR = _BV(WDCE) | _BV(WDE);
WDTCSR = x;
}
void appStart() {
watchdogConfig(WATCHDOG_OFF);
1fb2: 80 e0 ldi r24, 0x00 ; 0
1fb4: eb df rcall .-42 ; 0x1f8c <watchdogConfig>
__asm__ __volatile__ (
1fb6: ee 27 eor r30, r30
1fb8: ff 27 eor r31, r31
1fba: 09 94 ijmp

80
optiboot/pin_defs.h Normal file
View File

@ -0,0 +1,80 @@
#if defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) || defined(__AVR_ATmega88) || defined(__AVR_ATmega8__) || defined(__AVR_ATmega88__)
/* Onboard LED is connected to pin PB5 in Arduino NG, Diecimila, and Duemilanove */
#define LED_DDR DDRB
#define LED_PORT PORTB
#define LED_PIN PINB
#define LED PINB5
/* Ports for soft UART */
#ifdef SOFT_UART
#define UART_PORT PORTD
#define UART_PIN PIND
#define UART_DDR DDRD
#define UART_TX_BIT 1
#define UART_RX_BIT 0
#endif
#endif
#if defined(__AVR_ATmega8__)
//Name conversion R.Wiersma
#define UCSR0A UCSRA
#define UDR0 UDR
#define UDRE0 UDRE
#define RXC0 RXC
#define FE0 FE
#define TIFR1 TIFR
#define WDTCSR WDTCR
#endif
/* Luminet support */
#if defined(__AVR_ATtiny84__)
/* Red LED is connected to pin PA4 */
#define LED_DDR DDRA
#define LED_PORT PORTA
#define LED_PIN PINA
#define LED PINA4
/* Ports for soft UART - left port only for now. TX/RX on PA2/PA3 */
#ifdef SOFT_UART
#define UART_PORT PORTA
#define UART_PIN PINA
#define UART_DDR DDRA
#define UART_TX_BIT 2
#define UART_RX_BIT 3
#endif
#endif
/* Sanguino support */
#if defined(__AVR_ATmega644P__)
/* Onboard LED is connected to pin PB0 on Sanguino */
#define LED_DDR DDRB
#define LED_PORT PORTB
#define LED_PIN PINB
#define LED PINB0
/* Ports for soft UART */
#ifdef SOFT_UART
#define UART_PORT PORTD
#define UART_PIN PIND
#define UART_DDR DDRD
#define UART_TX_BIT 1
#define UART_RX_BIT 0
#endif
#endif
/* Mega support */
#if defined(__AVR_ATmega1280__)
/* Onboard LED is connected to pin PB7 on Arduino Mega */
#define LED_DDR DDRB
#define LED_PORT PORTB
#define LED_PIN PINB
#define LED PINB7
/* Ports for soft UART */
#ifdef SOFT_UART
#define UART_PORT PORTE
#define UART_PIN PINE
#define UART_DDR DDRE
#define UART_TX_BIT 1
#define UART_RX_BIT 0
#endif
#endif

39
optiboot/stk500.h Normal file
View File

@ -0,0 +1,39 @@
/* STK500 constants list, from AVRDUDE */
#define STK_OK 0x10
#define STK_FAILED 0x11 // Not used
#define STK_UNKNOWN 0x12 // Not used
#define STK_NODEVICE 0x13 // Not used
#define STK_INSYNC 0x14 // ' '
#define STK_NOSYNC 0x15 // Not used
#define ADC_CHANNEL_ERROR 0x16 // Not used
#define ADC_MEASURE_OK 0x17 // Not used
#define PWM_CHANNEL_ERROR 0x18 // Not used
#define PWM_ADJUST_OK 0x19 // Not used
#define CRC_EOP 0x20 // 'SPACE'
#define STK_GET_SYNC 0x30 // '0'
#define STK_GET_SIGN_ON 0x31 // '1'
#define STK_SET_PARAMETER 0x40 // '@'
#define STK_GET_PARAMETER 0x41 // 'A'
#define STK_SET_DEVICE 0x42 // 'B'
#define STK_SET_DEVICE_EXT 0x45 // 'E'
#define STK_ENTER_PROGMODE 0x50 // 'P'
#define STK_LEAVE_PROGMODE 0x51 // 'Q'
#define STK_CHIP_ERASE 0x52 // 'R'
#define STK_CHECK_AUTOINC 0x53 // 'S'
#define STK_LOAD_ADDRESS 0x55 // 'U'
#define STK_UNIVERSAL 0x56 // 'V'
#define STK_PROG_FLASH 0x60 // '`'
#define STK_PROG_DATA 0x61 // 'a'
#define STK_PROG_FUSE 0x62 // 'b'
#define STK_PROG_LOCK 0x63 // 'c'
#define STK_PROG_PAGE 0x64 // 'd'
#define STK_PROG_FUSE_EXT 0x65 // 'e'
#define STK_READ_FLASH 0x70 // 'p'
#define STK_READ_DATA 0x71 // 'q'
#define STK_READ_FUSE 0x72 // 'r'
#define STK_READ_LOCK 0x73 // 's'
#define STK_READ_PAGE 0x74 // 't'
#define STK_READ_SIGN 0x75 // 'u'
#define STK_READ_OSCCAL 0x76 // 'v'
#define STK_READ_FUSE_EXT 0x77 // 'w'
#define STK_READ_OSCCAL_EXT 0x78 // 'x'

2
plot/kaboard-B_Mask.gbs
View File

@ -1,4 +1,4 @@
G04 (created by PCBNEW (2012-12-10 BZR 3844)-stable) date Tue 18 Dec 2012 09:21:11 AM CET*
G04 (created by PCBNEW (2012-12-10 BZR 3844)-stable) date Thu 10 Jan 2013 10:25:41 AM CET*
%MOIN*%
G04 Gerber Fmt 3.4, Leading zero omitted, Abs format*
%FSLAX34Y34*%

168
plot/kaboard-B_SilkS.gbo
View File

@ -1,4 +1,4 @@
G04 (created by PCBNEW (2012-12-10 BZR 3844)-stable) date Tue 18 Dec 2012 09:21:11 AM CET*
G04 (created by PCBNEW (2012-12-10 BZR 3844)-stable) date Thu 10 Jan 2013 10:25:41 AM CET*
%MOIN*%
G04 Gerber Fmt 3.4, Leading zero omitted, Abs format*
%FSLAX34Y34*%
@ -10,17 +10,6 @@ G04 APERTURE LIST*
%ADD11C,0.015*%
%ADD12C,0.0099*%
%ADD13C,0.0001*%
%ADD14C,0.076*%
%ADD15R,0.075X0.075*%
%ADD16C,0.075*%
%ADD17O,0.11X0.082*%
%ADD18R,0.11X0.082*%
%ADD19R,0.12X0.12*%
%ADD20C,0.12*%
%ADD21C,0.2562*%
%ADD22C,0.0554*%
%ADD23R,0.08X0.08*%
%ADD24C,0.08*%
G04 APERTURE END LIST*
G54D10*
G54D11*
@ -11166,159 +11155,4 @@ X4155Y-4158D01*
X4155Y-4158D01*
X4155Y-4158D01*
G37*
%LPC*%
G54D14*
X2500Y-20500D03*
X2500Y-22500D03*
G54D15*
X3500Y-6000D03*
G54D16*
X2500Y-6000D03*
X1000Y-27500D03*
X3000Y-27500D03*
X1000Y-30500D03*
X3000Y-30500D03*
G54D15*
X9000Y-27000D03*
G54D16*
X9000Y-26000D03*
X9000Y-25000D03*
X9000Y-24000D03*
X9000Y-23000D03*
X9000Y-22000D03*
G54D15*
X9000Y-18000D03*
G54D16*
X9000Y-17000D03*
X9000Y-16000D03*
X9000Y-15000D03*
X9000Y-14000D03*
X9000Y-13000D03*
G54D15*
X10000Y-27000D03*
G54D16*
X10000Y-26000D03*
X10000Y-25000D03*
X10000Y-24000D03*
X10000Y-23000D03*
X10000Y-22000D03*
G54D15*
X11000Y-27000D03*
G54D16*
X11000Y-26000D03*
X11000Y-25000D03*
X11000Y-24000D03*
X11000Y-23000D03*
X11000Y-22000D03*
G54D15*
X10000Y-18000D03*
G54D16*
X10000Y-17000D03*
X10000Y-16000D03*
X10000Y-15000D03*
X10000Y-14000D03*
X10000Y-13000D03*
G54D15*
X11000Y-18000D03*
G54D16*
X11000Y-17000D03*
X11000Y-16000D03*
X11000Y-15000D03*
X11000Y-14000D03*
X11000Y-13000D03*
G54D15*
X3000Y-14000D03*
G54D16*
X3000Y-15000D03*
X3000Y-16000D03*
X3000Y-17000D03*
X3000Y-18000D03*
G54D15*
X2000Y-14000D03*
G54D16*
X2000Y-15000D03*
X2000Y-16000D03*
X2000Y-17000D03*
X2000Y-18000D03*
G54D15*
X1000Y-14000D03*
G54D16*
X1000Y-15000D03*
X1000Y-16000D03*
X1000Y-17000D03*
X1000Y-18000D03*
G54D15*
X1000Y-24500D03*
G54D16*
X1000Y-25500D03*
X1000Y-26500D03*
G54D15*
X2000Y-24500D03*
G54D16*
X2000Y-25500D03*
X2000Y-26500D03*
G54D15*
X3000Y-24500D03*
G54D16*
X3000Y-25500D03*
X3000Y-26500D03*
G54D15*
X8500Y-6000D03*
G54D16*
X9500Y-6000D03*
G54D15*
X9000Y-19000D03*
G54D16*
X9000Y-20000D03*
G54D17*
X4500Y-14000D03*
X4500Y-15000D03*
X4500Y-16000D03*
X4500Y-17000D03*
X4500Y-18000D03*
X4500Y-19000D03*
X4500Y-20000D03*
X4500Y-21000D03*
X4500Y-22000D03*
X4500Y-23000D03*
X4500Y-24000D03*
X4500Y-25000D03*
X4500Y-26000D03*
G54D18*
X4500Y-13000D03*
G54D17*
X7500Y-26000D03*
X7500Y-25000D03*
X7500Y-24000D03*
X7500Y-23000D03*
X7500Y-22000D03*
X7500Y-21000D03*
X7500Y-20000D03*
X7500Y-19000D03*
X7500Y-18000D03*
X7500Y-17000D03*
X7500Y-16000D03*
X7500Y-15000D03*
X7500Y-14000D03*
X7500Y-13000D03*
G54D19*
X5000Y-37500D03*
G54D20*
X7000Y-37500D03*
G54D21*
X2000Y-2000D03*
X10000Y-2000D03*
X2000Y-37000D03*
X10000Y-37000D03*
G54D22*
X6865Y-2540D03*
X5134Y-2540D03*
G54D23*
X7000Y-28500D03*
G54D24*
X7000Y-29500D03*
X6000Y-28500D03*
X6000Y-29500D03*
X5000Y-28500D03*
X5000Y-29500D03*
M02*

192
plot/kaboard-Back.gbl
View File

@ -1,4 +1,4 @@
G04 (created by PCBNEW (2012-12-10 BZR 3844)-stable) date Tue 18 Dec 2012 09:21:11 AM CET*
G04 (created by PCBNEW (2012-12-10 BZR 3844)-stable) date Thu 10 Jan 2013 10:25:41 AM CET*
%MOIN*%
G04 Gerber Fmt 3.4, Leading zero omitted, Abs format*
%FSLAX34Y34*%
@ -180,7 +180,9 @@ X5000Y-29500D03*
G54D19*
X5500Y-6000D03*
X7000Y-6000D03*
X8000Y-10400D03*
X8200Y-11450D03*
X6550Y-11050D03*
X6550Y-9650D03*
G54D22*
X2000Y-23500D02*
X2000Y-24500D01*
@ -226,43 +228,41 @@ X6950Y-24000D01*
X7000Y-6000D02*
X5500Y-6000D01*
G54D22*
X5000Y-28500D02*
X5000Y-27500D01*
X8000Y-11100D02*
X8000Y-10400D01*
X6300Y-11450D02*
X7650Y-11450D01*
X7650Y-11450D02*
X8000Y-11100D01*
X5500Y-13000D02*
X5500Y-12250D01*
X8200Y-11450D01*
X5500Y-12250D02*
X6300Y-11450D01*
G54D23*
X6300Y-11450D02*
X8200Y-11450D01*
X5500Y-12250D02*
X6300Y-11450D01*
G54D22*
X5500Y-13000D02*
X5500Y-12250D01*
X5500Y-13000D02*
X5500Y-13500D01*
X4500Y-13000D02*
X5500Y-13000D01*
G54D23*
X5500Y-12250D02*
X5500Y-13000D01*
X5500Y-13000D02*
X5500Y-13500D01*
X7650Y-11450D02*
X8000Y-11100D01*
X6300Y-11450D02*
X7650Y-11450D01*
X5500Y-12250D02*
X6300Y-11450D01*
X8000Y-10400D02*
X8000Y-11100D01*
G54D22*
X5500Y-27000D02*
X5500Y-13500D01*
X3000Y-27500D02*
X5000Y-27500D01*
X5000Y-27500D02*
X5500Y-27000D01*
X5000Y-28500D02*
X5000Y-27500D01*
X4500Y-13000D02*
X5500Y-13000D01*
X3000Y-27500D02*
X5000Y-27500D01*
G54D23*
X6550Y-10350D02*
X6550Y-11050D01*
X6550Y-10350D02*
X6550Y-9650D01*
X6000Y-28500D02*
X6000Y-22500D01*
X6500Y-22000D02*
@ -1265,21 +1265,15 @@ X10743Y-38114D01*
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X8025Y-11187D01*
X7992Y-11219D01*
X7310Y-11219D01*
X7310Y-6062D01*
X7310Y-5939D01*
@ -1349,7 +1343,32 @@ X7175Y-6263D01*
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X6300Y-11219D01*
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X6813Y-10875D01*
X6742Y-10803D01*
X6742Y-10350D01*
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X6813Y-9826D01*
X6860Y-9712D01*
X6860Y-9589D01*
X6813Y-9475D01*
X6726Y-9387D01*
X6612Y-9340D01*
X6489Y-9340D01*
X6375Y-9387D01*
X6287Y-9474D01*
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X6240Y-9711D01*
X6287Y-9825D01*
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X6287Y-10874D01*
X6240Y-10988D01*
X6240Y-11111D01*
X6285Y-11221D01*
X6226Y-11234D01*
X6211Y-11237D01*
X6136Y-11287D01*
@ -1949,20 +1968,14 @@ X5731Y-13500D01*
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X5731Y-12345D01*
X6395Y-11681D01*
X7650Y-11681D01*
X7738Y-11663D01*
X7813Y-11613D01*
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X8163Y-11263D01*
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X8212Y-11189D01*
X8213Y-11188D01*
X8230Y-11101D01*
X8231Y-11100D01*
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X8310Y-10462D01*
X8310Y-38825D01*
X7992Y-11681D01*
X8024Y-11713D01*
X8138Y-11760D01*
X8261Y-11760D01*
X8375Y-11713D01*
X8463Y-11626D01*
X8510Y-11512D01*
X8510Y-38825D01*
X8094Y-38825D01*
X8094Y-26000D01*
X8094Y-25000D01*
@ -4051,21 +4064,15 @@ X10743Y-38114D01*
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X7992Y-11219D01*
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X7310Y-5939D01*
@ -4135,7 +4142,32 @@ X7175Y-6263D01*
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X6815Y-11219D01*
X6860Y-11112D01*
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X6860Y-9589D01*
X6813Y-9475D01*
X6726Y-9387D01*
X6612Y-9340D01*
X6489Y-9340D01*
X6375Y-9387D01*
X6287Y-9474D01*
X6240Y-9588D01*
X6240Y-9711D01*
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X6358Y-9896D01*
X6358Y-10350D01*
X6358Y-10803D01*
X6287Y-10874D01*
X6240Y-10988D01*
X6240Y-11111D01*
X6285Y-11221D01*
X6226Y-11234D01*
X6211Y-11237D01*
X6136Y-11287D01*
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X5731Y-12345D01*
X6395Y-11681D01*
X7650Y-11681D01*
X7738Y-11663D01*
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X8195Y-11214D01*
X8212Y-11189D01*
X8213Y-11188D01*
X8230Y-11101D01*
X8231Y-11100D01*
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X8310Y-10462D01*
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X8094Y-26000D01*
X8094Y-25000D01*

5
plot/kaboard-F_Mask.gts
View File

@ -1,4 +1,4 @@
G04 (created by PCBNEW (2012-12-10 BZR 3844)-stable) date Tue 18 Dec 2012 09:21:11 AM CET*
G04 (created by PCBNEW (2012-12-10 BZR 3844)-stable) date Thu 10 Jan 2013 10:25:41 AM CET*
%MOIN*%
G04 Gerber Fmt 3.4, Leading zero omitted, Abs format*
%FSLAX34Y34*%
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M02*

327
plot/kaboard-F_SilkS.gto
View File

@ -1,4 +1,4 @@
G04 (created by PCBNEW (2012-12-10 BZR 3844)-stable) date Tue 18 Dec 2012 09:21:11 AM CET*
G04 (created by PCBNEW (2012-12-10 BZR 3844)-stable) date Thu 10 Jan 2013 10:25:41 AM CET*
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%FSLAX34Y34*%
@ -21,28 +21,6 @@ G04 APERTURE LIST*
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%ADD33R,0.065X0.045*%
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@ -1102,6 +1080,14 @@ G74*
G01*
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G36*
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@ -2523,261 +2547,4 @@ X8200Y-28712D02*
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G54D29*
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X6314Y-3535D03*
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M02*

2906
plot/kaboard-Front.gtl
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File diff suppressed because it is too large Load Diff

6
plot/kaboard.drl
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@ -1,5 +1,5 @@
M48
;DRILL file {Pcbnew (2012-12-10 BZR 3844)-stable} date Tue 18 Dec 2012 09:02:32 AM CET
;DRILL file {Pcbnew (2012-12-10 BZR 3844)-stable} date Thu 10 Jan 2013 10:25:45 AM CET
;FORMAT={3:3/ absolute / metric / suppress leading zeros}
FMAT,2
METRIC,TZ
@ -16,8 +16,10 @@ G05
M71
T1
X13970Y-15240
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X16637Y-28067
X17780Y-15240
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T2
X6350Y-52070
X6350Y-57150

484
plot/panelized_v1.0/kaboard_panelized-B_Mask.gbs Normal file
View File

@ -0,0 +1,484 @@
G04 (created by PCBNEW (2012-12-10 BZR 3844)-stable) date Tue 18 Dec 2012 09:43:10 AM CET*
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G04 Gerber Fmt 3.4, Leading zero omitted, Abs format*
%FSLAX34Y34*%
G01*
G70*
G90*
G04 APERTURE LIST*
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G54D10*
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33923
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0
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@ -0,0 +1,803 @@
G04 (created by PCBNEW (2012-12-10 BZR 3844)-stable) date Tue 18 Dec 2012 09:43:10 AM CET*
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G04 Gerber Fmt 3.4, Leading zero omitted, Abs format*
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